Re: Vectorized assembler routines for IA-64

[Torbjorn Granlund]

Bob Deblier <address@hidden> writes:

  I'm experimenting with vectorized multi-precision assembler routines
  for the IA-64 processor.

  I currently have working optimized routines equivalent to add_n and
  addmul_1, tested on Suse's compile farm. If you're interested, it
  will be very easy for me to convert to my routines to a version
  suitable for GMP. The addmul routine will require only a re-ordering
  of the parameters, while the addition routine would require some
  minor work.

  Please let me know if you're interested in this contribution.

We have some code in the development sources already.
But perhaps your code is better.

What performance numbers do you have for the respective routines,
in cycles/limb at various sizes?

In the gmp sources, under mpn/tests there are a number of test
programs.  They can be used for correctness tests as well as
performance tests.

Correctness:

gcc -I<source_path> -I<build_path> -DCLOCK=667000000 -DTIMES=1 -DRANDOM \
  <source_path>/mpn/tests/addmul_1.c test-addmul_1.s \
  <build_path>/.libs/libgmp.a

Performance, vary n for measurements at different sizes:

gcc -I<source_path> -I<build_path> -DCLOCK=667000000 -DNOCHECK -DSIZE=<n> \
  -O <source_path>/mpn/tests/addmul_1.c test-addmul_1.s \
  <build_path>/.libs/libgmp.a

--
Torbjörn