Small improvement in m68k\lshift.S

[Jean-Charles Meyrignac]

Hi !

I would like to suggest an improvement, since 2 shiftings are done for 32
bits, and this can be reduced to 1 shifting for 32 bits.

 movel MEM_PREDEC(s_ptr),R(d2)
 movel R(d2),R(d3)
 lsrl R(d5),R(d3)
 orl R(d3),R(d1)
 movel R(d1),MEM_PREDEC(res_ptr)
 lsll R(cnt),R(d2)

The shifting can be replaced by a ROR.L.
We just have to initialize a mask bits (for example in D4):
(I'll write using my standard notation for 68K assembly)
moveq #0,R(d5)
bset R(cnt),R(d5)
subq.l #1,R(d5)

here d5 contains 2^cnt-1

movel MEM_PREDEC(s_ptr), R(d2)
roll R(cnt),R(d2)
movel R(d2),R(d3)
andl R(d5),R(d2)
xorl R(d2),R(d3)
orl R(d3),R(d1)
movel R(d1),MEM_PREDEC(res_ptr)

movel MEM_PREDEC(s_ptr), R(d1)
roll R(cnt),R(d1)
movel R(d1),R(d3)
andl R(d5),R(d1)
xorl R(d1),R(d3)
orl R(d3),R(d2)
movel R(d2),MEM_PREDEC(res_ptr)

It takes one more instruction, compared to your method, but it is also
faster, since shiftings take 6+2*n cycles, instead of 4+4 cycles in my case.

I'm not sure the implementation is correct, but I'm sure this method is
faster !

JC