Re: PowerPC GMP Improvement

[Kevin Ryde]

Nate Begeman <address@hidden> writes:
>
> I was wondering if there is an ongoing effort to improve the speed of GMP
> using Motorola's AltiVec ISA extension to PowerPC.

Holger Bettag (Cc'ed) made a bit of a start.

> If not, I'm willing to
> tackle it over the next few weeks.  Just as a warmup, I have population
> count running at about 10 bits per clock, which isn't too bad for a chip
> that doesn't have a popcount instruction.

The generic C measures about 16 cycles/limb for the popcount or 18 for
the hamdist, so you've beaten that.

Torbjorn Granlund <address@hidden> writes:
>   
> Kevin has been working on some PowerPC improvements recently.
> I don't think he's worked on any SIMD stuff.

Yep, just some integer-only basics.

> Note that only older G4 chips will bnefit from SIMD code; newer ones
> (7440 and up) have pipelined 32x32->64 bit integer multiply, which
> almost surely will be faster.

I guess bitwise stuff like mpn_com_n or block copies like mpn_copyi
might benefit from the greater load/store throughput.

But alignment is a problem since GMP data will only normally be
aligned to a 32-bit boundary, whereas altivec might prefer 128-bit.
It doesn't seem easy to do anything about that.  Always possible to
check for favourable or unfavourable alignment at runtime I guess.