Re: New PowerPC 7400 Code

[Kevin Ryde]

BRENDAN CHRISTOPHER YOUNGER <address@hidden> writes:
>
> Unfortunately, it doesn't.  I've also since discovered that it doesn't
> work for overlapping source and destination.  (An oversight on my
> part.)  Fortunately, it shouldn't be difficult to rectify either of
> these failings and I expect to have revised C code done as soon as I
> have time.

Another guy interested in altivec had found the alignment handling a
bit tricky.  The shifts are probably easier to treat than the muls
though.  One possibility used in the x86 mmx code is to effectively
increase the shift count if source and destination don't have the same
alignment.

> I'd be interested to know what
> the relative calling frequencies are for this function.  (i.e., how long
> are the limb arrays?)

We aim to make both small and large sizes go fast.  Small sizes should
slip through without too much overhead, larger sizes should aim for
peak throughput.  It's usually best to attack the per-limb throughput
first, and worry about overheads later.

> And finally, the code I sent assumes 32-bit limbs and no nail bits.  I
> doubt there are plans to change either of these details in the future,
> but if there is, I might be able to hack out a general function for
> either case.

32-bits will definitely stay for the 32-bit ppcs, and there's no
immediate plans to use nails with them.