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bug#63251: 28.2; vhdl-mode contribution
From: |
Eli Zaretskii |
Subject: |
bug#63251: 28.2; vhdl-mode contribution |
Date: |
Thu, 04 May 2023 08:16:47 +0300 |
> From: Cyril Arnould <cyril.arnould@outlook.com>
> Date: Wed, 3 May 2023 19:40:18 +0000
>
> Following bug#62508, I've taken a bit of a closer look at the compiler
> regexp for ModelSim. I've modified it so that it can differentiate
> between Errors, Warnings and Notes when highlighting. I also make use of
> Xilinx Vivado at work, for which I've added a new compiler entry:
>
>
> --- a/lisp/progmodes/vhdl-mode.el
> +++ b/lisp/progmodes/vhdl-mode.el
> @@ -286,7 +286,7 @@ vhdl-compiler-alist
> ;; counter_rtl.vhd(29):Conditional signal assignment line__29
> ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1"
> nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim"
> - ("^\\(ERROR\\|WARNING\\|\\*\\* Error\\|\\*\\* Warning\\)[^:]*:\\(
> *\\[[0-9]+]\\| ([^)]+)\\)? \\([^ \t\n]+\\)(\\([0-9]+\\)):" 3 4 nil)
> + ("^\\(?:\\(?1:ERROR\\|\\*\\* Error\\)\\|\\(?2:WARNING\\|\\*\\*
> Warning\\)\\|\\(?3:NOTE\\|\\*\\* Note\\)\\)[^:]*:\\( *\\[[0-9]+]\\|
> ([^)]+)\\)? \\(?4:[^ \t\n]+\\)(\\(?5:[0-9]+\\)):" 4 5 nil (2 . 3))
> ("" 0)
> ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat"
> "\\1/_primary.dat" "\\1/body.dat" downcase))
> @@ -385,6 +385,13 @@ vhdl-compiler-alist
> nil "mkdir \\1" "./" "work/" "Makefile" "xilinx"
> ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\."
> 1 2 nil) ("" 0)
> nil)
> + ;; Xilinx Vivado:
> + ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23]
> + ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1"
> + nil "mkdir \\1" "./" "work" "Makefile" "vivado"
> + ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\)
> \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0)
> + ("\\1/entity" "\\2/\\1" "\\1/configuration"
> + "\\1/package" "\\1/body" downcase))
> )
> "List of available VHDL compilers and their properties.
> Each list entry specifies the following items for a compiler:
>
>
> The patch was generated from the emacs master branch. I would greatly
> appreciate it if these changes could find their way in some form into a
> future emacs release.
Reto, any comments on these changes?
Thanks.
- bug#63251: 28.2; vhdl-mode contribution, Cyril Arnould, 2023/05/03
- bug#63251: 28.2; vhdl-mode contribution,
Eli Zaretskii <=
- bug#63251: 28.2; vhdl-mode contribution, Mattias Engdegård, 2023/05/06
- bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution, Cyril Arnould, 2023/05/06
- bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution, Cyril Arnould, 2023/05/06
- bug#63251: 28.2; vhdl-mode contribution, Mattias Engdegård, 2023/05/07
- bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution, Cyril Arnould, 2023/05/07
- bug#63251: 28.2; vhdl-mode contribution, Mattias Engdegård, 2023/05/07
- bug#63251: AW: bug#63251: 28.2; vhdl-mode contribution, Cyril Arnould, 2023/05/07
- bug#63251: 28.2; vhdl-mode contribution, Mattias Engdegård, 2023/05/07