This was discussed back in 2010-03
http://lists.nongnu.org/archive/html/pgubook-readers/2010-03/index.html
but as i didn't understand it fully from reading those posts, and it was over a year ago here is my own question:
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Hi,
i have a question after reading the beginning of the book. On page 15 we read that :
"In the indexed addressing mode, the instruction contains a memory address to
access, and also specifies an index register to offset that address."
Now
this is all easy to follow: a memory address offset by the number
contained in an index register. So with the starting address being
2002, with an offset of 3 we arrive at the memory location 2005.
Then
we have the next concept: the multiplier for the index, allowing us to
access memory one byte at a time , as above, or a word/4 bytes at a
time with a value of 4.
So
starting at 2002 and loading index register with 3 ( zero would mean
the location we specified in the first place ? ) , specifying a
multiplier of 1 (one byte at a time ) cycling through the the next 3
bytes we come to 2005.
Now the next example we start at 2002 again but want to cycle 4 words forward so we have
2002 index 3 + multiplier 4 (one word) arriving at memory location 2014
How
can this be if we are going forward 4 bytes ( 0,1,2,3 ?) at a time we
would arrive at location 2017 ( the last byte of the 4th word) ??
Any help greatly apreciated
Mike |