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Re: [Qemu-arm] [PATCH] ftgmac100: implement the new MDIO interface on As
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-arm] [PATCH] ftgmac100: implement the new MDIO interface on Aspeed SoC |
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Date: |
Thu, 17 Jan 2019 18:44:42 +0000 |
On Fri, 11 Jan 2019 at 12:58, Cédric Le Goater <address@hidden> wrote:
>
> The PHY behind the MAC of an Aspeed SoC can be controlled using two
> different MDC/MDIO interfaces. The same registers PHYCR (MAC60) and
> PHYDATA (MAC64) are involved but they have a different layout.
>
> BIT31 of the Feature Register (MAC40) controls which MDC/MDIO
> interface is active.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---
Applied to target-arm.next, thanks.
-- PMM