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Re: [Qemu-arm] [Qemu-devel] [PATCH 01/23] armv7m: Don't assume the NVIC'
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 01/23] armv7m: Don't assume the NVIC's CPU is CPU 0 |
Date: |
Mon, 21 Jan 2019 21:26:02 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 1/21/19 7:50 PM, Peter Maydell wrote:
> Currently the ARMv7M NVIC object's realize method assumes that the
> CPU the NVIC is attached to is CPU 0, because it thinks there can
> only ever be one CPU in the system. To allow a dual-Cortex-M33
> setup we need to remove this assumption; instead the armv7m
> wrapper object tells the NVIC its CPU, in the same way that it
> already tells the CPU what the NVIC is.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> hw/arm/armv7m.c | 6 ++++--
> hw/intc/armv7m_nvic.c | 3 +--
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
> index f4446528307..f9aa83d20ef 100644
> --- a/hw/arm/armv7m.c
> +++ b/hw/arm/armv7m.c
> @@ -178,10 +178,12 @@ static void armv7m_realize(DeviceState *dev, Error
> **errp)
> }
> }
>
> - /* Tell the CPU where the NVIC is; it will fail realize if it doesn't
> - * have one.
> + /*
> + * Tell the CPU where the NVIC is; it will fail realize if it doesn't
> + * have one. Similarly, tell the NVIC where its CPU is.
> */
> s->cpu->env.nvic = &s->nvic;
> + s->nvic.cpu = s->cpu;
>
> object_property_set_bool(OBJECT(s->cpu), true, "realized", &err);
> if (err != NULL) {
> diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
> index 0beefb05d44..790a3d95849 100644
> --- a/hw/intc/armv7m_nvic.c
> +++ b/hw/intc/armv7m_nvic.c
> @@ -2274,8 +2274,7 @@ static void armv7m_nvic_realize(DeviceState *dev, Error
> **errp)
> Error *err = NULL;
> int regionlen;
>
> - s->cpu = ARM_CPU(qemu_get_cpu(0));
> -
> + /* The armv7m container object will have set our CPU pointer */
> if (!s->cpu || !arm_feature(&s->cpu->env, ARM_FEATURE_M)) {
> error_setg(errp, "The NVIC can only be used with a Cortex-M CPU");
> return;
>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
- [Qemu-arm] [PATCH 00/23] arm: Implement MPS2 AN521 FPGA image, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 02/23] armv7m: Make cpu object a child of the armv7m container, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 01/23] armv7m: Don't assume the NVIC's CPU is CPU 0, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 03/23] armv7m: Pass through start-powered-off CPU property, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 04/23] hw/arm/iotkit: Rename IoTKit to ARMSSE, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 23/23] hw/arm/mps2-tz: Add mps2-an521 model, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 22/23] hw/arm/mps2-tz: Add IRQ infrastructure to support SSE-200, Peter Maydell, 2019/01/21