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Re: [Qemu-arm] [PATCH 2/4] aspeed/smc: define registers for all possible
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From: |
Joel Stanley |
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Subject: |
Re: [Qemu-arm] [PATCH 2/4] aspeed/smc: define registers for all possible CS |
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Date: |
Fri, 25 Jan 2019 07:08:37 +1100 |
On Fri, 25 Jan 2019 at 01:08, Cédric Le Goater <address@hidden> wrote:
>
> The model should expose one control register per possible CS. When
> testing the validity of the register number in the read operation,
> replace 's->num_cs' by 'ctrl->max_slaves' which represents the maximum
> number of flash devices a controller can handle.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
- [Qemu-arm] [PATCH 0/4] aspeed/smc: add fast read support under User command mode., Cédric Le Goater, 2019/01/24
- [Qemu-arm] [PATCH 1/4] aspeed/smc: fix default read value, Cédric Le Goater, 2019/01/24
- [Qemu-arm] [PATCH 2/4] aspeed/smc: define registers for all possible CS, Cédric Le Goater, 2019/01/24
- Re: [Qemu-arm] [PATCH 2/4] aspeed/smc: define registers for all possible CS,
Joel Stanley <=
- [Qemu-arm] [PATCH 4/4] aspeed/smc: snoop SPI transfers to fake dummy cycles, Cédric Le Goater, 2019/01/24
- [Qemu-arm] [PATCH 3/4] aspeed/smc: Add dummy data register, Cédric Le Goater, 2019/01/24
- Re: [Qemu-arm] [PATCH 0/4] aspeed/smc: add fast read support under User command mode., Peter Maydell, 2019/01/28