Re: [Qemu-arm] [Qemu-devel] [PATCH 1/2] target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions

[Richard Henderson]

On 2/22/19 9:09 AM, Peter Maydell wrote:
> Instead of gating the A32/T32 FP16 conversion instructions on
> the ARM_FEATURE_VFP_FP16 flag, switch to our new approach of
> looking at ID register bits. In this case MVFR1 fields FPHP
> and SIMDHP indicate the presence of these insns.
> 
> This change doesn't alter behaviour for any of our CPUs.
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target/arm/cpu.h       | 37 ++++++++++++++++++++++++++++++++++++-
>  target/arm/cpu.c       |  2 --
>  target/arm/kvm32.c     |  3 ---
>  target/arm/translate.c | 26 ++++++++++++++++++--------
>  4 files changed, 54 insertions(+), 14 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~