[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 2/2] docs: update hw/nvme documentation for protection information
From: |
Klaus Jensen |
Subject: |
[PULL 2/2] docs: update hw/nvme documentation for protection information |
Date: |
Tue, 8 Aug 2023 08:27:30 +0200 |
From: Ankit Kumar <ankit.kumar@samsung.com>
Add missing entry for pif ("protection information format").
Protection information size can be 8 or 16 bytes, Update the pil entry
as per the NVM command set specification.
Signed-off-by: Ankit Kumar <ankit.kumar@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
docs/system/devices/nvme.rst | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/docs/system/devices/nvme.rst b/docs/system/devices/nvme.rst
index 2a3af268f7a5..32ff287cd78e 100644
--- a/docs/system/devices/nvme.rst
+++ b/docs/system/devices/nvme.rst
@@ -271,9 +271,15 @@ The virtual namespace device supports DIF- and DIX-based
protection information
``pil=UINT8`` (default: ``0``)
Controls the location of the protection information within the metadata. Set
- to ``1`` to transfer protection information as the first eight bytes of
- metadata. Otherwise, the protection information is transferred as the last
- eight bytes.
+ to ``1`` to transfer protection information as the first bytes of metadata.
+ Otherwise, the protection information is transferred as the last bytes of
+ metadata.
+
+``pif=UINT8`` (default: ``0``)
+ By default, the namespace device uses 16 bit guard protection information
+ format (``pif=0``). Set to ``2`` to enable 64 bit guard protection
+ information format. This requires at least 16 bytes of metadata. Note that
+ ``pif=2`` (32 bit guards) are currently not supported.
Virtualization Enhancements and SR-IOV (Experimental Support)
-------------------------------------------------------------
--
2.41.0