[Qemu-commits] [qemu/qemu] 08f021: target/openrisc: Allow fpcsr access in user mode

[Richard Henderson]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 08f021de3af599b8ca4c745f324a3559dc2990d3
      
https://github.com/qemu/qemu/commit/08f021de3af599b8ca4c745f324a3559dc2990d3
  Author: Stafford Horne <shorne@gmail.com>
  Date:   2023-05-11 (Thu, 11 May 2023)

  Changed paths:
    M target/openrisc/sys_helper.c
    M target/openrisc/translate.c

  Log Message:
  -----------
  target/openrisc: Allow fpcsr access in user mode

As per OpenRISC spec 1.4 FPCSR can be read and written in user mode.

Update mtspr and mfspr helpers to support this by moving the is_user
check into the helper.

Link: 
https://raw.githubusercontent.com/openrisc/doc/master/openrisc-arch-1.4-rev0.pdf
Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9156ca76cb39ff1d72e701dec4a907f73592d88f
      
https://github.com/qemu/qemu/commit/9156ca76cb39ff1d72e701dec4a907f73592d88f
  Author: Stafford Horne <shorne@gmail.com>
  Date:   2023-05-11 (Thu, 11 May 2023)

  Changed paths:
    M target/openrisc/fpu_helper.c

  Log Message:
  -----------
  target/openrisc: Set PC to cpu state on FPU exception

Store the PC to ensure the correct value can be read in the exception
handler.

Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 874c52991e1fbe020812b4b15440b6875369aacf
      
https://github.com/qemu/qemu/commit/874c52991e1fbe020812b4b15440b6875369aacf
  Author: Stafford Horne <shorne@gmail.com>
  Date:   2023-05-11 (Thu, 11 May 2023)

  Changed paths:
    M target/openrisc/cpu.c

  Log Message:
  -----------
  target/openrisc: Setup FPU for detecting tininess before rounding

OpenRISC defines tininess to be detected before rounding.  Setup qemu to
obey this.

Signed-off-by: Stafford Horne <shorne@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 8844bb8d896595ee1d25d21c770e6e6f29803097
      
https://github.com/qemu/qemu/commit/8844bb8d896595ee1d25d21c770e6e6f29803097
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-05-13 (Sat, 13 May 2023)

  Changed paths:
    M target/openrisc/cpu.c
    M target/openrisc/fpu_helper.c
    M target/openrisc/sys_helper.c
    M target/openrisc/translate.c

  Log Message:
  -----------
  Merge tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu 
into staging

OpenRISC FPU Updates for 8.1

A few fixes and updates to bring OpenRISC inline with the latest
architecture spec updates:

 - Allow FPCSR to be accessed in user mode
 - Select tininess detection before rounding
 - Fix FPE Exception PC value

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# gpg: Good signature from "Stafford Horne <shorne@gmail.com>" [unknown]
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* tag 'or1k-pull-request-20230513' of https://github.com/stffrdhrn/qemu:
  target/openrisc: Setup FPU for detecting tininess before rounding
  target/openrisc: Set PC to cpu state on FPU exception
  target/openrisc: Allow fpcsr access in user mode

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/debca86cad28...8844bb8d8965