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[Qemu-commits] [qemu/qemu] e8f433: memory: Let ReservedRegion use Range
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From: |
Alex Bennée |
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Subject: |
[Qemu-commits] [qemu/qemu] e8f433: memory: Let ReservedRegion use Range |
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Date: |
Mon, 06 Nov 2023 16:49:05 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: e8f433f80e831ecd81989ae0246f3f1e2d3ac480
https://github.com/qemu/qemu/commit/e8f433f80e831ecd81989ae0246f3f1e2d3ac480
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/core/qdev-properties-system.c
M hw/virtio/virtio-iommu.c
M include/exec/memory.h
Log Message:
-----------
memory: Let ReservedRegion use Range
A reserved region is a range tagged with a type. Let's directly use
the Range type in the prospect to reuse some of the library helpers
shipped with the Range type.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 51478a8ef5694cbd92b9a3436ec4489464210a8e
https://github.com/qemu/qemu/commit/51478a8ef5694cbd92b9a3436ec4489464210a8e
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M include/exec/memory.h
M system/memory.c
Log Message:
-----------
memory: Introduce memory_region_iommu_set_iova_ranges
This helper will allow to convey information about valid
IOVA ranges to virtual IOMMUS.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
[ clg: fixes in memory_region_iommu_set_iova_ranges() and
iommu_set_iova_ranges() documentation ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: e4a8ae09c538880440ba866174b0015f147c8c9e
https://github.com/qemu/qemu/commit/e4a8ae09c538880440ba866174b0015f147c8c9e
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/vfio/common.c
M hw/vfio/container.c
M include/hw/vfio/vfio-common.h
Log Message:
-----------
vfio: Collect container iova range info
Collect iova range information if VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE
capability is supported.
This allows to propagate the information though the IOMMU MR
set_iova_ranges() callback so that virtual IOMMUs
get aware of those aperture constraints. This is only done if
the info is available and the number of iova ranges is greater than
0.
A new vfio_get_info_iova_range helper is introduced matching
the coding style of existing vfio_get_info_dma_avail. The
boolean returned value isn't used though. Code is aligned
between both.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
Tested-by: Yanghang Liu <yanghliu@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 41cc70cdf53268cd1bc9719014acf739932b51e5
https://github.com/qemu/qemu/commit/41cc70cdf53268cd1bc9719014acf739932b51e5
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/virtio/virtio-iommu-pci.c
M hw/virtio/virtio-iommu.c
M include/hw/virtio/virtio-iommu.h
Log Message:
-----------
virtio-iommu: Rename reserved_regions into prop_resv_regions
Rename VirtIOIOMMU (nb_)reserved_regions fields with the "prop_" prefix
to highlight those fields are set through a property, at machine level.
They are IOMMU wide.
A subsequent patch will introduce per IOMMUDevice reserved regions
that will include both those IOMMU wide property reserved
regions plus, sometimes, host reserved regions, if the device is
backed by a host device protected by a physical IOMMU. Also change
nb_ prefix by nr_.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 43f04cbeff863ae68b6ead432af5e771b92b934c
https://github.com/qemu/qemu/commit/43f04cbeff863ae68b6ead432af5e771b92b934c
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M include/qemu/range.h
M util/range.c
Log Message:
-----------
range: Make range_compare() public
Let's expose range_compare() in the header so that it can be
reused outside of util/range.c
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: c3104847363f4ac5d4e76e8ed637280f7be1ee68
https://github.com/qemu/qemu/commit/c3104847363f4ac5d4e76e8ed637280f7be1ee68
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
A include/qemu/reserved-region.h
M util/meson.build
A util/reserved-region.c
Log Message:
-----------
util/reserved-region: Add new ReservedRegion helpers
Introduce resv_region_list_insert() helper which inserts
a new ReservedRegion into a sorted list of reserved region.
In case of overlap, the new region has higher priority and
hides the existing overlapped segments. If the overlap is
partial, new regions are created for parts which are not
overlapped. The new region has higher priority independently
on the type of the regions.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Tested-by: Yanghang Liu <yanghliu@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 908cae0de4fd63a58f5a7dc447f843a5be9cff46
https://github.com/qemu/qemu/commit/908cae0de4fd63a58f5a7dc447f843a5be9cff46
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/virtio/virtio-iommu.c
M include/hw/virtio/virtio-iommu.h
Log Message:
-----------
virtio-iommu: Introduce per IOMMUDevice reserved regions
For the time being the per device reserved regions are
just a duplicate of IOMMU wide reserved regions. Subsequent
patches will combine those with host reserved regions, if any.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Yanghang Liu <yanghliu@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: b439595a08d79120325de4684698bb7b6516aa8a
https://github.com/qemu/qemu/commit/b439595a08d79120325de4684698bb7b6516aa8a
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M include/qemu/range.h
M util/range.c
Log Message:
-----------
range: Introduce range_inverse_array()
This helper reverses a list of regions within a [low, high]
span, turning original regions into holes and original
holes into actual regions, covering the whole UINT64_MAX span.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Yanghang Liu <yanghliu@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 09b4c3d6a2f098e64cc25aa63f388ea943990279
https://github.com/qemu/qemu/commit/09b4c3d6a2f098e64cc25aa63f388ea943990279
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/virtio/virtio-iommu.c
M include/hw/virtio/virtio-iommu.h
Log Message:
-----------
virtio-iommu: Record whether a probe request has been issued
Add an IOMMUDevice 'probe_done' flag to record that the driver
already issued a probe request on that device.
This will be useful to double check host reserved regions aren't
notified after the probe and hence are not taken into account
by the driver.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Suggested-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
Tested-by: Yanghang Liu <yanghliu@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 30d40e39bdcb50e67f7cca7bee8bf59234c4ec12
https://github.com/qemu/qemu/commit/30d40e39bdcb50e67f7cca7bee8bf59234c4ec12
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/virtio/virtio-iommu.c
M include/hw/virtio/virtio-iommu.h
Log Message:
-----------
virtio-iommu: Implement set_iova_ranges() callback
The implementation populates the array of per IOMMUDevice
host reserved ranges.
It is forbidden to have conflicting sets of host IOVA ranges
to be applied onto the same IOMMU MR (implied by different
host devices).
In case the callback is called after the probe request has
been issues by the driver, a warning is issued.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
Tested-by: Yanghang Liu <yanghliu@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 5c476ba3fad3b7659988f28aae8b1b8d5331effc
https://github.com/qemu/qemu/commit/5c476ba3fad3b7659988f28aae8b1b8d5331effc
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/virtio/trace-events
M hw/virtio/virtio-iommu.c
Log Message:
-----------
virtio-iommu: Consolidate host reserved regions and property set ones
Up to now we were exposing to the RESV_MEM probe requests the
reserved memory regions set though the reserved-regions array property.
Combine those with the host reserved memory regions if any. Those
latter are tagged as RESERVED. We don't have more information about
them besides then cannot be mapped. Reserved regions set by
property have higher priority.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
Tested-by: Yanghang Liu <yanghliu@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 71177490a87c08e7ac53ab00bad06d68f439a4cd
https://github.com/qemu/qemu/commit/71177490a87c08e7ac53ab00bad06d68f439a4cd
Author: Eric Auger <eric.auger@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M tests/unit/meson.build
A tests/unit/test-resv-mem.c
Log Message:
-----------
test: Add some tests for range and resv-mem helpers
Add unit tests for both resv_region_list_insert() and
range_inverse_array().
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: "Michael S. Tsirkin" <mst@redhat.com>
[ clg: Removal of unused variable in compare_ranges() ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: ba7d12eb8ce2d7367615071c0569947457d36803
https://github.com/qemu/qemu/commit/ba7d12eb8ce2d7367615071c0569947457d36803
Author: Yi Liu <yi.l.liu@intel.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M docs/devel/index-api.rst
A docs/devel/pci.rst
M hw/alpha/typhoon.c
M hw/arm/smmu-common.c
M hw/i386/amd_iommu.c
M hw/i386/intel_iommu.c
M hw/pci-host/astro.c
M hw/pci-host/designware.c
M hw/pci-host/dino.c
M hw/pci-host/pnv_phb3.c
M hw/pci-host/pnv_phb4.c
M hw/pci-host/ppce500.c
M hw/pci-host/raven.c
M hw/pci-host/sabre.c
M hw/pci/pci.c
M hw/ppc/ppc440_pcix.c
M hw/ppc/spapr_pci.c
M hw/remote/iommu.c
M hw/s390x/s390-pci-bus.c
M hw/virtio/virtio-iommu.c
M include/hw/pci/pci.h
M include/hw/pci/pci_bus.h
Log Message:
-----------
hw/pci: modify pci_setup_iommu() to set PCIIOMMUOps
This patch modifies pci_setup_iommu() to set PCIIOMMUOps
instead of setting PCIIOMMUFunc. PCIIOMMUFunc is used to
get an address space for a PCI device in vendor specific
way. The PCIIOMMUOps still offers this functionality. But
using PCIIOMMUOps leaves space to add more iommu related
vendor specific operations.
Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Eric Auger <eric.auger@redhat.com>
Cc: Yi Sun <yi.y.sun@linux.intel.com>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Eric Auger <eric.auger@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Hervé Poussineau <hpoussin@reactos.org>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: BALATON Zoltan <balaton@eik.bme.hu>
Cc: Elena Ufimtseva <elena.ufimtseva@oracle.com>
Cc: Jagannathan Raman <jag.raman@oracle.com>
Cc: Matthew Rosato <mjrosato@linux.ibm.com>
Cc: Eric Farman <farman@linux.ibm.com>
Cc: Halil Pasic <pasic@linux.ibm.com>
Cc: Christian Borntraeger <borntraeger@linux.ibm.com>
Cc: Thomas Huth <thuth@redhat.com>
Cc: Helge Deller <deller@gmx.de>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Yi Liu <yi.l.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
[ clg: - refreshed on latest QEMU
- included hw/remote/iommu.c
- documentation update
- asserts in pci_setup_iommu()
- removed checks on iommu_bus->iommu_ops->get_address_space
- included Elroy PCI host (PA-RISC) ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 721da0396cfa0a4859cefb57e32cc79d19d80f54
https://github.com/qemu/qemu/commit/721da0396cfa0a4859cefb57e32cc79d19d80f54
Author: Cédric Le Goater <clg@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M block/parallels-ext.c
M block/vdi.c
M hw/core/qdev-properties-system.c
M hw/hyperv/vmbus.c
M include/qemu/uuid.h
M migration/savevm.c
M tests/unit/test-uuid.c
M util/uuid.c
Log Message:
-----------
util/uuid: Add UUID_STR_LEN definition
qemu_uuid_unparse() includes a trailing NUL when writing the uuid
string and the buffer size should be UUID_FMT_LEN + 1 bytes. Add a
define for this size and use it where required.
Cc: Fam Zheng <fam@euphon.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: "Denis V. Lunev" <den@openvz.org>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: f8d6f3b16c37bd516a026e92a31dade5d761d3a6
https://github.com/qemu/qemu/commit/f8d6f3b16c37bd516a026e92a31dade5d761d3a6
Author: Cédric Le Goater <clg@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/vfio/pci.c
Log Message:
-----------
vfio/pci: Fix buffer overrun when writing the VF token
qemu_uuid_unparse() includes a trailing NUL when writing the uuid
string and the buffer size should be UUID_FMT_LEN + 1 bytes. Use the
recently added UUID_STR_LEN which defines the correct size.
Fixes: CID 1522913
Fixes: 2dca1b37a760 ("vfio/pci: add support for VF token")
Cc: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: "Denis V. Lunev" <den@openvz.org>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 4ef9d97b1a37b8cfd152cc3ac5f9576e406868b1
https://github.com/qemu/qemu/commit/4ef9d97b1a37b8cfd152cc3ac5f9576e406868b1
Author: Cédric Le Goater <clg@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M include/qemu/uuid.h
Log Message:
-----------
util/uuid: Remove UUID_FMT_LEN
Dangerous and now unused.
Cc: Fam Zheng <fam@euphon.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: "Denis V. Lunev" <den@openvz.org>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 5fe51934b1cd94a75007dd456fecc2ff6ee622e7
https://github.com/qemu/qemu/commit/5fe51934b1cd94a75007dd456fecc2ff6ee622e7
Author: Cédric Le Goater <clg@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M include/qemu/uuid.h
Log Message:
-----------
util/uuid: Define UUID_STR_LEN from UUID_NONE string
Cc: Fam Zheng <fam@euphon.net>
Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 6c1b28e9e405da8cfb7296b9efa2b85650086784
https://github.com/qemu/qemu/commit/6c1b28e9e405da8cfb7296b9efa2b85650086784
Author: David Hildenbrand <david@redhat.com>
Date: 2023-11-03 (Fri, 03 Nov 2023)
Changed paths:
M hw/mem/memory-device.c
M include/hw/mem/memory-device.h
Log Message:
-----------
memory-device: Support empty memory devices
Let's support empty memory devices -- memory devices that don't have a
memory device region in the current configuration. hv-balloon with an
optional memdev is the primary use case.
Signed-off-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: a24fe909f30c7b6ad49848af1b15c1dc714081b5
https://github.com/qemu/qemu/commit/a24fe909f30c7b6ad49848af1b15c1dc714081b5
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2023-11-05 (Sun, 05 Nov 2023)
Changed paths:
M hw/display/macfb.c
Log Message:
-----------
macfb: don't clear interrupts when writing to DAFB_RESET
Traces from A/UX suggest that this register is only used to reset the
framebuffer
LUT (colour lookup table) and not any other device state.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-ID: <20231026085650.917663-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Commit: 2fca4e7a710bc5783b1043ce354b0597b519f157
https://github.com/qemu/qemu/commit/2fca4e7a710bc5783b1043ce354b0597b519f157
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2023-11-05 (Sun, 05 Nov 2023)
Changed paths:
M hw/display/macfb.c
Log Message:
-----------
macfb: rename DAFB_RESET to DAFB_LUT_INDEX
When A/UX uses the MacOS Device Manager Status (GetEntries) call to read the
contents of the CLUT, it is easy to see that the requested index is written to
the DAFB_RESET register. Update the palette_current index with the requested
value, and rename it to DAFB_LUT_INDEX to reflect its true purpose.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-ID: <20231026085650.917663-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Commit: ced64254d66c28e18e669318aaffa0338df6ae3a
https://github.com/qemu/qemu/commit/ced64254d66c28e18e669318aaffa0338df6ae3a
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2023-11-05 (Sun, 05 Nov 2023)
Changed paths:
M hw/display/macfb.c
Log Message:
-----------
macfb: allow larger write accesses to the DAFB_LUT register
The original tests with MacOS showed that only the bottom 8 bits of the DAFB_LUT
register were used when writing to the LUT, however A/UX performs some of its
writes using 4 byte accesses. Expand the address range for the DAFB_LUT register
so that different size accesses write the correct value to the color_palette
array.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-ID: <20231026085650.917663-4-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Commit: 95f3943210416e054751bc230d4cec7d87995525
https://github.com/qemu/qemu/commit/95f3943210416e054751bc230d4cec7d87995525
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2023-11-05 (Sun, 05 Nov 2023)
Changed paths:
M hw/display/macfb.c
Log Message:
-----------
macfb: allow reads from the DAFB_LUT register
This enables A/UX to correctly retrieve the LUT entries when used with
applications that use the MacOS Device Manager Status (GetEntries) call.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-ID: <20231026085650.917663-5-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Commit: d5b737669c7253c3d7ab08cf6a95175f79ad8d8b
https://github.com/qemu/qemu/commit/d5b737669c7253c3d7ab08cf6a95175f79ad8d8b
Author: Akihiko Odaki <akihiko.odaki@daynix.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M system/vl.c
Log Message:
-----------
vl: Free machine list
Free machine list and make LeakSanitizer happy.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230722062641.18505-1-akihiko.odaki@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 4e40abd93f1c3d27ba33bfa650005afc83f91e81
https://github.com/qemu/qemu/commit/4e40abd93f1c3d27ba33bfa650005afc83f91e81
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M system/vl.c
Log Message:
-----------
vl: constify default_list
It's not modified, let's make it const.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231030101529.105266-1-marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: fc0817c6046888eaebaa1b70bad3b4718807c521
https://github.com/qemu/qemu/commit/fc0817c6046888eaebaa1b70bad3b4718807c521
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M tests/vm/ubuntu.aarch64
Log Message:
-----------
tests/vm/ubuntu.aarch64: Correct comment about TCG specific delay
Wether we use a software MMU or not to set the SSH timeout
isn't really relevant. What we want to know is if we use
a hardware or software accelerator (TCG).
Replace the 'softmmu' mention by 'TCG'.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231002145104.52193-2-philmd@linaro.org>
Commit: 043b4c557844c42683bd7f9610bec4825312955c
https://github.com/qemu/qemu/commit/043b4c557844c42683bd7f9610bec4825312955c
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M tests/unit/test-seccomp.c
Log Message:
-----------
tests/unit/test-seccomp: Remove mentions of softmmu in test names
Wether we are using a software MMU or not is irrelevant for the
seccomp facility. The facility is restricted to system emulation,
but such detail isn't really helpful, so directly drop the
'softmmu' mention from the test names.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231002145104.52193-3-philmd@linaro.org>
Commit: ba857f603373564137f70e443252fac7b236b229
https://github.com/qemu/qemu/commit/ba857f603373564137f70e443252fac7b236b229
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/tcg-accel-ops.c
M hw/core/cpu-common.c
M include/exec/cpu-common.h
M include/exec/tb-flush.h
M plugins/core.c
Log Message:
-----------
accel/tcg: Declare tcg_flush_jmp_cache() in 'exec/tb-flush.h'
"exec/cpu-common.h" is meant to contain the declarations
related to CPU usable with any accelerator / target
combination.
tcg_flush_jmp_cache() is specific to TCG, so restrict its
declaration by moving it to "exec/tb-flush.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230918104153.24433-2-philmd@linaro.org>
Commit: 4dbab4cf50009e826360705741cf538f0e125bb0
https://github.com/qemu/qemu/commit/4dbab4cf50009e826360705741cf538f0e125bb0
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M accel/tcg/user-exec-stub.c
M hw/core/cpu-common.c
M include/hw/core/cpu.h
M include/sysemu/accel-ops.h
M system/cpus.c
Log Message:
-----------
accel: Introduce cpu_exec_reset_hold()
Introduce cpu_exec_reset_hold() which call an accelerator
specific AccelOpsClass::cpu_reset_hold() handler.
Define a stub on TCG user emulation, because CPU reset is
irrelevant there.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230918104153.24433-3-philmd@linaro.org>
Commit: 5d686f5ab9ef1d49d79074950984e4f7e1f226af
https://github.com/qemu/qemu/commit/5d686f5ab9ef1d49d79074950984e4f7e1f226af
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M accel/stubs/tcg-stub.c
M accel/tcg/tcg-accel-ops.c
M accel/tcg/translate-all.c
M hw/core/cpu-common.c
M include/exec/cpu-common.h
Log Message:
-----------
accel/tcg: Factor tcg_cpu_reset_hold() out
Factor the TCG specific code from cpu_common_reset_hold() to
tcg_cpu_reset_hold() within tcg-accel-ops.c. Since this file
is sysemu specific, we can inline tcg_flush_softmmu_tlb(),
removing its declaration in "exec/cpu-common.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230918104153.24433-4-philmd@linaro.org>
Commit: cbebaf85714769083f958688671c9da05f9d99f5
https://github.com/qemu/qemu/commit/cbebaf85714769083f958688671c9da05f9d99f5
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/alpha/cpu-qom.h
M target/alpha/cpu.h
M target/arm/cpu-qom.h
M target/arm/cpu.h
M target/avr/cpu-qom.h
M target/avr/cpu.h
M target/cris/cpu-qom.h
M target/cris/cpu.h
M target/hexagon/cpu.h
M target/hppa/cpu-qom.h
M target/hppa/cpu.h
M target/i386/cpu-qom.h
M target/i386/cpu.h
M target/loongarch/cpu.h
M target/m68k/cpu-qom.h
M target/m68k/cpu.h
M target/microblaze/cpu-qom.h
M target/microblaze/cpu.h
M target/mips/cpu-qom.h
M target/mips/cpu.h
M target/nios2/cpu.h
M target/openrisc/cpu.h
M target/ppc/cpu.h
M target/riscv/cpu-qom.h
M target/riscv/cpu.h
M target/rx/cpu-qom.h
M target/rx/cpu.h
M target/s390x/cpu-qom.h
M target/s390x/cpu.h
M target/sh4/cpu-qom.h
M target/sh4/cpu.h
M target/sparc/cpu-qom.h
M target/sparc/cpu.h
M target/tricore/cpu-qom.h
M target/tricore/cpu.h
M target/xtensa/cpu-qom.h
M target/xtensa/cpu.h
Log Message:
-----------
target: Unify QOM style
Enforce the style described by commit 067109a11c ("docs/devel:
mention the spacing requirement for QOM"):
The first declaration of a storage or class structure should
always be the parent and leave a visual space between that
declaration and the new code. It is also useful to separate
backing for properties (options driven by the user) and internal
state to make navigation easier.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231013140116.255-2-philmd@linaro.org>
Commit: 7e13b6187fb9774048ba79f2aa108deff34d6a75
https://github.com/qemu/qemu/commit/7e13b6187fb9774048ba79f2aa108deff34d6a75
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/arm/cpu-qom.h
M target/hppa/cpu-qom.h
M target/microblaze/cpu-qom.h
Log Message:
-----------
target: Mention 'cpu-qom.h' is target agnostic
"target/foo/cpu-qom.h" is supposed to be target agnostic
(include-able by any target). Add such mention in the
header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-3-philmd@linaro.org>
Commit: 19d42d4b0babaa232a60bafc0327a95fc51cf730
https://github.com/qemu/qemu/commit/19d42d4b0babaa232a60bafc0327a95fc51cf730
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/arm/cpu-qom.h
M target/arm/cpu.h
M target/arm/internals.h
Log Message:
-----------
target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h'
These definitions and declarations are only used by
target/arm/, no need to expose them to generic hw/.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-4-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <c48c9829-3dfa-79cf-3042-454fda0d00dc@linaro.org>
Commit: ad4711c6ed8669ec623b5c44e02c8208c61ebbe4
https://github.com/qemu/qemu/commit/ad4711c6ed8669ec623b5c44e02c8208c61ebbe4
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/ppc/cpu-qom.h
M target/ppc/cpu.h
Log Message:
-----------
target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'
CPU_RESOLVING_TYPE is a per-target definition, and is
irrelevant for other targets. Move it to "cpu.h".
"target/ppc/cpu-qom.h" is supposed to be target agnostic
(include-able by any target). Add such mention in the
header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-5-philmd@linaro.org>
Commit: b365bf2908eb8f793f129c1d9466628b10242541
https://github.com/qemu/qemu/commit/b365bf2908eb8f793f129c1d9466628b10242541
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/riscv/cpu-qom.h
M target/riscv/cpu.h
Log Message:
-----------
target/riscv: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h'
CPU_RESOLVING_TYPE is a per-target definition, and is
irrelevant for other targets. Move it to "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-6-philmd@linaro.org>
Commit: 42336d52bfd9e157017a531729b6c631559864b8
https://github.com/qemu/qemu/commit/42336d52bfd9e157017a531729b6c631559864b8
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/alpha/cpu-qom.h
M target/alpha/cpu.h
M target/avr/cpu-qom.h
M target/avr/cpu.h
M target/cris/cpu-qom.h
M target/cris/cpu.h
M target/i386/cpu-qom.h
M target/i386/cpu.h
M target/m68k/cpu-qom.h
M target/m68k/cpu.h
M target/mips/cpu-qom.h
M target/mips/cpu.h
M target/rx/cpu-qom.h
M target/rx/cpu.h
M target/s390x/cpu-qom.h
M target/s390x/cpu.h
M target/sh4/cpu-qom.h
M target/sh4/cpu.h
M target/sparc/cpu-qom.h
M target/sparc/cpu.h
M target/tricore/cpu-qom.h
M target/tricore/cpu.h
M target/xtensa/cpu-qom.h
M target/xtensa/cpu.h
Log Message:
-----------
target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'
Hegerogeneous code needs access to the FOO_CPU_TYPE_NAME()
macro to resolve target CPU types. Move the declaration
(along with the required FOO_CPU_TYPE_SUFFIX) to "cpu-qom.h".
"target/foo/cpu-qom.h" is supposed to be target agnostic
(include-able by any target). Add such mention in the
header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-7-philmd@linaro.org>
Commit: 06bb39fc42e4f34f6d119b960c1f4ab200b9ea42
https://github.com/qemu/qemu/commit/06bb39fc42e4f34f6d119b960c1f4ab200b9ea42
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
A target/hexagon/cpu-qom.h
M target/hexagon/cpu.h
Log Message:
-----------
target/hexagon: Declare QOM definitions in 'cpu-qom.h'
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Add a comment clarifying that in the header.
Extract QOM definitions from "cpu.h" to "cpu-qom.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <20231013140116.255-8-philmd@linaro.org>
Commit: 744661c0dca320a3456ab98f271f0b3676324d5f
https://github.com/qemu/qemu/commit/744661c0dca320a3456ab98f271f0b3676324d5f
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
A target/loongarch/cpu-qom.h
M target/loongarch/cpu.h
Log Message:
-----------
target/loongarch: Declare QOM definitions in 'cpu-qom.h'
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Add a comment clarifying that in the header.
Extract QOM definitions from "cpu.h" to "cpu-qom.h".
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-9-philmd@linaro.org>
Commit: f1b509d81f796d223d406aec910ae0214cb57e50
https://github.com/qemu/qemu/commit/f1b509d81f796d223d406aec910ae0214cb57e50
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
A target/nios2/cpu-qom.h
M target/nios2/cpu.h
Log Message:
-----------
target/nios2: Declare QOM definitions in 'cpu-qom.h'
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Add a comment clarifying that in the header.
Extract QOM definitions from "cpu.h" to "cpu-qom.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-10-philmd@linaro.org>
Commit: d1bf8d32892b158d9a1572bb09e07ab85bf4af6f
https://github.com/qemu/qemu/commit/d1bf8d32892b158d9a1572bb09e07ab85bf4af6f
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
A target/openrisc/cpu-qom.h
M target/openrisc/cpu.h
Log Message:
-----------
target/openrisc: Declare QOM definitions in 'cpu-qom.h'
"target/foo/cpu.h" contains the target specific declarations.
A heterogeneous setup need to access target agnostic declarations
(at least the QOM ones, to instantiate the objects).
Our convention is to add such target agnostic QOM declarations in
the "target/foo/cpu-qom.h" header.
Add a comment clarifying that in the header.
Extract QOM definitions from "cpu.h" to "cpu-qom.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-11-philmd@linaro.org>
Commit: a5502e5cc0498a2e25f50b17fa9814b8db60bff6
https://github.com/qemu/qemu/commit/a5502e5cc0498a2e25f50b17fa9814b8db60bff6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/riscv/cpu-qom.h
M target/riscv/cpu.h
Log Message:
-----------
target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h'
TYPE_RISCV_CPU_BASE depends on the TARGET_RISCV32/TARGET_RISCV64
definitions which are target specific. Such target specific
definition taints "cpu-qom.h".
Since "cpu-qom.h" must be target agnostic, remove its target
specific definition uses by moving TYPE_RISCV_CPU_BASE to
"target/riscv/cpu.h".
"target/riscv/cpu-qom.h" is now fully target agnostic.
Add a comment clarifying that in the header.
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231013140116.255-12-philmd@linaro.org>
Commit: 9f947545041a1bf9e81ed3d71a4e5374eced59d7
https://github.com/qemu/qemu/commit/9f947545041a1bf9e81ed3d71a4e5374eced59d7
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/ppc/excp_helper.c
Log Message:
-----------
target/ppc: Use env_archcpu() in helper_book3s_msgsndp()
When CPUArchState* is available (here CPUPPCState*), we
can use the fast env_archcpu() macro to get ArchCPU* (here
PowerPCCPU*). The QOM cast POWERPC_CPU() macro will be
slower when building with --enable-qom-cast-debug.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20231009110239.66778-2-philmd@linaro.org>
Commit: 633ad3a78cca80e69410c837f7fdc13613b57d18
https://github.com/qemu/qemu/commit/633ad3a78cca80e69410c837f7fdc13613b57d18
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/riscv/internals.h
Log Message:
-----------
target/riscv: Use env_archcpu() in [check_]nanbox()
When CPUArchState* is available (here CPURISCVState*), we
can use the fast env_archcpu() macro to get ArchCPU* (here
RISCVCPU*). The QOM cast RISCV_CPU() macro will be slower
when building with --enable-qom-cast-debug.
Inspired-by: Richard W.M. Jones <rjones@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20231009110239.66778-3-philmd@linaro.org>
Commit: a15ce867640933edbad3a5674a923c2353e299f9
https://github.com/qemu/qemu/commit/a15ce867640933edbad3a5674a923c2353e299f9
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/s390x/diag.c
Log Message:
-----------
target/s390x: Use env_archcpu() in handle_diag_308()
When CPUArchState* is available (here CPUS390XState*), we
can use the fast env_archcpu() macro to get ArchCPU* (here
S390CPU*). The QOM cast S390_CPU() macro will be slower when
building with --enable-qom-cast-debug.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20231009110239.66778-4-philmd@linaro.org>
Commit: f6776b6b9a48e93dddc9f2c40201f1608e077a0b
https://github.com/qemu/qemu/commit/f6776b6b9a48e93dddc9f2c40201f1608e077a0b
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/xtensa/op_helper.c
Log Message:
-----------
target/xtensa: Use env_archcpu() in update_c[compare|count]()
When CPUArchState* is available (here CPUXtensaState*), we
can use the fast env_archcpu() macro to get ArchCPU* (here
XtensaCPU*). The QOM cast XTENSA_CPU() macro will be slower
when building with --enable-qom-cast-debug.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20231009110239.66778-5-philmd@linaro.org>
Commit: e4ed358695064939ab0cb337997f2be980cca5f4
https://github.com/qemu/qemu/commit/e4ed358695064939ab0cb337997f2be980cca5f4
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/hvf/x86_emu.c
Log Message:
-----------
target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr]()
We already have 'x86_cpu = X86_CPU(cpu)'. Use the variable
instead of doing another QOM cast with X86_CPU().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Roman Bolshakov <roman@roolebo.dev>
Tested-by: Roman Bolshakov <roman@roolebo.dev>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231009110239.66778-6-philmd@linaro.org>
Commit: 58cc10ca8b43a87cebff86fd5356d608eb2657b5
https://github.com/qemu/qemu/commit/58cc10ca8b43a87cebff86fd5356d608eb2657b5
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/hvf/hvf.c
M target/i386/hvf/x86_emu.c
M target/i386/hvf/x86_emu.h
Log Message:
-----------
target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr]()
When CPUArchState* is available (here CPUX86State*), we can
use the fast env_archcpu() macro to get ArchCPU* (here X86CPU*).
The QOM cast X86_CPU() macro will be slower when building with
--enable-qom-cast-debug.
Pass CPUX86State* as argument to simulate_rdmsr / simulate_wrmsr
instead of a CPUState* to avoid an extra cast.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Roman Bolshakov <roman@roolebo.dev>
Tested-by: Roman Bolshakov <roman@roolebo.dev>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231009110239.66778-7-philmd@linaro.org>
Commit: 1c8c20843b3899c03ed9d653e95f198ce3147b4b
https://github.com/qemu/qemu/commit/1c8c20843b3899c03ed9d653e95f198ce3147b4b
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/hvf/x86_emu.c
Log Message:
-----------
target/i386/hvf: Use CPUState typedef
Follow C style guidelines and use CPUState forward
declaration from "qemu/typedefs.h".
No functional changes.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231020111136.44401-2-philmd@linaro.org>
Commit: 4e4ec5617d2f2cb490a373c3c4bee99fd12d1d39
https://github.com/qemu/qemu/commit/4e4ec5617d2f2cb490a373c3c4bee99fd12d1d39
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/hvf/x86_emu.c
Log Message:
-----------
target/i386/hvf: Rename 'CPUState *cpu' variable as 'cs'
Follow the naming used by other files in target/i386/.
No functional changes.
Suggested-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231020111136.44401-3-philmd@linaro.org>
Commit: 4a29fdf165ce17ba769be2955e4f46c8ec767134
https://github.com/qemu/qemu/commit/4a29fdf165ce17ba769be2955e4f46c8ec767134
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/hvf/x86_emu.c
Log Message:
-----------
target/i386/hvf: Rename 'X86CPU *x86_cpu' variable as 'cpu'
Follow the naming used by other files in target/i386/.
No functional changes.
Suggested-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231020111136.44401-4-philmd@linaro.org>
Commit: 29e2f90a680564cb83cc83960e1b9a50381e0261
https://github.com/qemu/qemu/commit/29e2f90a680564cb83cc83960e1b9a50381e0261
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/kvm/kvm-cpu.c
Log Message:
-----------
target/i386/kvm: Correct comment in kvm_cpu_realize()
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230918160257.30127-4-philmd@linaro.org>
Commit: 14fc9210bca435e43ad9092b8b2af2c735ea7e02
https://github.com/qemu/qemu/commit/14fc9210bca435e43ad9092b8b2af2c735ea7e02
Author: Dongli Zhang <dongli.zhang@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/monitor.c
Log Message:
-----------
target/i386/monitor: synchronize cpu state for lapic info
While the default "info lapic" always synchronizes cpu state ...
mon_get_cpu()
-> mon_get_cpu_sync(mon, true)
-> cpu_synchronize_state(cpu)
-> ioctl KVM_GET_LAPIC (taking KVM as example)
... the cpu state is not synchronized when the apic-id is available as
argument.
The cpu state should be synchronized when apic-id is available. Otherwise
the "info lapic <apic-id>" always returns stale data.
Reference:
https://lore.kernel.org/all/20211028155457.967291-19-berrange@redhat.com/
Cc: Joe Jin <joe.jin@oracle.com>
Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: David Woodhouse <dwmw@amazon.co.uk>
Message-ID: <20231030085336.2681386-1-armbru@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-ID: <20231026211938.162815-1-dongli.zhang@oracle.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 01cea3c629ad92b90443a375994c13c8d4c81dfc
https://github.com/qemu/qemu/commit/01cea3c629ad92b90443a375994c13c8d4c81dfc
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/mips/tcg/msa.decode
Log Message:
-----------
target/mips: Fix MSA BZ/BNZ opcodes displacement
The PC offset is *signed*.
Cc: qemu-stable@nongnu.org
Reported-by: Sergey Evlashev <vectorchiefrocks@gmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1624
Fixes: c7a9ef7517 ("target/mips: Introduce decode tree bindings for MSA ASE")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914085807.12241-1-philmd@linaro.org>
Commit: faf92ad2a58a4fbd306fb6c62debb03622afcab2
https://github.com/qemu/qemu/commit/faf92ad2a58a4fbd306fb6c62debb03622afcab2
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/mips/tcg/tx79.decode
Log Message:
-----------
target/mips: Fix TX79 LQ/SQ opcodes
The base register address offset is *signed*.
Cc: qemu-stable@nongnu.org
Fixes: aaaa82a9f9 ("target/mips/tx79: Introduce LQ opcode (Load Quadword)")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914090447.12557-1-philmd@linaro.org>
Commit: 641bad926bf51d2860f5f5a579bd61df61c07533
https://github.com/qemu/qemu/commit/641bad926bf51d2860f5f5a579bd61df61c07533
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M include/sysemu/kvm.h
M target/ppc/kvm.c
Log Message:
-----------
sysemu/kvm: Restrict kvmppc_get_radix_page_info() to ppc targets
kvm_get_radix_page_info() is only defined for ppc targets (in
target/ppc/kvm.c). The declaration is not useful in other targets,
reduce its scope.
Rename using the 'kvmppc_' prefix following other declarations
from target/ppc/kvm_ppc.h.
Suggested-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20231003070427.69621-2-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: c8ef0389c26ddf136c20037188c9b968cfd4aee6
https://github.com/qemu/qemu/commit/c8ef0389c26ddf136c20037188c9b968cfd4aee6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/ppc/e500.c
R target/ppc/kvm-stub.c
M target/ppc/meson.build
Log Message:
-----------
hw/ppc/e500: Restrict ppce500_init_mpic_kvm() to KVM
Inline and guard the single call to kvm_openpic_connect_vcpu()
allows to remove kvm-stub.c.
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231003070427.69621-3-philmd@linaro.org>
Commit: 81b8c2e07ead1a9f4dfe4060ffb79db7515975c3
https://github.com/qemu/qemu/commit/81b8c2e07ead1a9f4dfe4060ffb79db7515975c3
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/ppc/meson.build
Log Message:
-----------
target/ppc: Restrict KVM objects to system emulation
CONFIG_KVM is always FALSE on user emulation, so 'kvm.c'
won't be added to ppc_ss[] source set; direcly use the system
specific ppc_system_ss[] source set.
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231003070427.69621-4-philmd@linaro.org>
Commit: 2bb7cf6c3fd363fec7db95d02f97fec7bcbc1098
https://github.com/qemu/qemu/commit/2bb7cf6c3fd363fec7db95d02f97fec7bcbc1098
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/ppc/kvm_ppc.h
Log Message:
-----------
target/ppc: Prohibit target specific KVM prototypes on user emulation
None of these target-specific prototypes should be used
by user emulation. Remove their declaration there, so we
get a compile failure if ever used (instead of having to
deal with linker and its possible optimizations, such
dead code removal).
Suggested-by: Kevin Wolf <kwolf@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20231003070427.69621-5-philmd@linaro.org>
Commit: 39c27af9281cf1a282d775facfffd5734e001997
https://github.com/qemu/qemu/commit/39c27af9281cf1a282d775facfffd5734e001997
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/nios2/cpu.c
Log Message:
-----------
target/nios2: Create IRQs *after* accelerator vCPU is realized
Architecture specific hardware doesn't have a particular dependency
on the accelerator vCPU (created with cpu_exec_realizefn), and can
be initialized *after* the vCPU is realized. Doing so allows further
generic API simplification (in few commits).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230918160257.30127-12-philmd@linaro.org>
Commit: a372ae774c47a77059899d18f24aff879854c41c
https://github.com/qemu/qemu/commit/a372ae774c47a77059899d18f24aff879854c41c
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/alpha/cpu.c
Log Message:
-----------
target/alpha: Tidy up alpha_cpu_class_by_name()
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-Id: <20230908112235.75914-2-philmd@linaro.org>
Commit: 84854eee4cf3bf6a6aa6c99372569a95ce24849b
https://github.com/qemu/qemu/commit/84854eee4cf3bf6a6aa6c99372569a95ce24849b
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/core/cpu-common.c
M include/hw/core/cpu.h
M target/alpha/cpu.c
M target/arm/cpu.c
M target/avr/cpu.c
M target/cris/cpu.c
M target/hexagon/cpu.c
M target/loongarch/cpu.c
M target/m68k/cpu.c
M target/openrisc/cpu.c
M target/riscv/cpu.c
M target/rx/cpu.c
M target/sh4/cpu.c
M target/tricore/cpu.c
M target/xtensa/cpu.c
Log Message:
-----------
hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()
Let CPUClass::class_by_name() handlers to return abstract classes,
and filter them once in the public cpu_class_by_name() method.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908112235.75914-3-philmd@linaro.org>
Commit: 34f9e682e2cf3cb11e244eb6b0a4ff6b905ffc8f
https://github.com/qemu/qemu/commit/34f9e682e2cf3cb11e244eb6b0a4ff6b905ffc8f
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M cpu-target.c
M include/hw/core/cpu.h
Log Message:
-----------
exec/cpu: Have cpu_exec_realize() return a boolean
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have cpu_exec_realizefn()
return a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230918160257.30127-22-philmd@linaro.org>
Commit: d5a8eb107889d37a2236893d27aace24dc1dc12e
https://github.com/qemu/qemu/commit/d5a8eb107889d37a2236893d27aace24dc1dc12e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M cpu-common.c
M include/hw/core/cpu.h
M linux-user/main.c
M target/s390x/cpu_models.c
Log Message:
-----------
hw/cpu: Clean up global variable shadowing
Fix:
hw/core/machine.c:1302:22: error: declaration shadows a variable in the
global scope [-Werror,-Wshadow]
const CPUArchId *cpus = possible_cpus->cpus;
^
hw/core/numa.c:69:17: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
uint16List *cpus = NULL;
^
hw/acpi/aml-build.c:2005:20: error: declaration shadows a variable in the
global scope [-Werror,-Wshadow]
CPUArchIdList *cpus = ms->possible_cpus;
^
hw/core/machine-smp.c:77:14: error: declaration shadows a variable in the
global scope [-Werror,-Wshadow]
unsigned cpus = config->has_cpus ? config->cpus : 0;
^
include/hw/core/cpu.h:589:17: note: previous declaration is here
extern CPUTailQ cpus;
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Message-Id: <20231010115048.11856-2-philmd@linaro.org>
Commit: 7ed89e943d4e9ded66abefc69aaa917cd95e92f4
https://github.com/qemu/qemu/commit/7ed89e943d4e9ded66abefc69aaa917cd95e92f4
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/core/loader.c
M include/hw/loader.h
Log Message:
-----------
hw/loader: Clean up global variable shadowing in rom_add_file()
Fix:
hw/core/loader.c:1073:27: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
bool option_rom, MemoryRegion *mr,
^
include/sysemu/sysemu.h:57:22: note: previous declaration is here
extern QEMUOptionRom option_rom[MAX_OPTION_ROMS];
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Message-Id: <20231010115048.11856-3-philmd@linaro.org>
Commit: e8c34f181bad2122c8cbca7c9f8987abf28ba333
https://github.com/qemu/qemu/commit/e8c34f181bad2122c8cbca7c9f8987abf28ba333
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/isa/i82378.c
Log Message:
-----------
hw/isa/i82378: Propagate error if PC_SPEAKER device creation failed
In commit 40f8214fcd ("hw/audio/pcspk: Inline pcspk_init()")
we neglected to give a change to the caller to handle failed
device creation cleanly. Respect the caller API contract and
propagate the error if creating the PC_SPEAKER device ever
failed. This avoid yet another bad API use to be taken as
example and copy / pasted all over the code base.
Reported-by: Bernhard Beschow <shentey@gmail.com>
Suggested-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231020171509.87839-5-philmd@linaro.org>
Commit: 85eefbc138e39d629d48a58294858e0d9ce5777f
https://github.com/qemu/qemu/commit/85eefbc138e39d629d48a58294858e0d9ce5777f
Author: Zhao Liu <zhao1.liu@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M include/hw/i386/topology.h
Log Message:
-----------
hw/i386: Fix comment style in topology.h
For function comments in this file, keep the comment style consistent
with other files in the directory.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@Intel.com>
Reviewed-by: Babu Moger <babu.moger@amd.com>
Tested-by: Babu Moger <babu.moger@amd.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20231024090323.1859210-2-zhao1.liu@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 2fb8646a8d33d1bb4b56812f77ea5a5b5c2ec274
https://github.com/qemu/qemu/commit/2fb8646a8d33d1bb4b56812f77ea5a5b5c2ec274
Author: Zhao Liu <zhao1.liu@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M MAINTAINERS
M tests/unit/meson.build
R tests/unit/test-x86-cpuid.c
A tests/unit/test-x86-topo.c
Log Message:
-----------
tests/unit: Rename test-x86-cpuid.c to test-x86-topo.c
The tests in this file actually test the APIC ID combinations.
Rename to test-x86-topo.c to make its name more in line with its
actual content.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Babu Moger <babu.moger@amd.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20231024090323.1859210-3-zhao1.liu@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: e969f992c6562222e245dd8557f5b132a11ec29c
https://github.com/qemu/qemu/commit/e969f992c6562222e245dd8557f5b132a11ec29c
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/kvm/xen-emu.c
Log Message:
-----------
i386/xen: Don't advertise XENFEAT_supervisor_mode_kernel
This confuses lscpu into thinking it's running in PVH mode.
Cc: qemu-stable@nongnu.org
Fixes: bedcc139248 ("i386/xen: implement HYPERVISOR_xen_version")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
Commit: e7dbb62ff19ce55548c785d76e814e7b144e6217
https://github.com/qemu/qemu/commit/e7dbb62ff19ce55548c785d76e814e7b144e6217
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/i386/kvm/xen-emu.c
Log Message:
-----------
i386/xen: fix per-vCPU upcall vector for Xen emulation
The per-vCPU upcall vector support had three problems. Firstly it was
using the wrong hypercall argument and would always return -EFAULT when
the guest tried to set it up. Secondly it was using the wrong ioctl() to
pass the vector to the kernel and thus the *kernel* would always return
-EINVAL. Finally, even when delivering the event directly from userspace
with an MSI, it put the destination CPU ID into the wrong bits of the
MSI address.
Linux doesn't (yet) use this mode so it went without decent testing
for a while.
Cc: qemu-stable@nongnu.org
Fixes: 105b47fdf2d0 ("i386/xen: implement HVMOP_set_evtchn_upcall_vector")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
Commit: 18e83f28bf39ffd2784aeb2e4e229096a86d349b
https://github.com/qemu/qemu/commit/18e83f28bf39ffd2784aeb2e4e229096a86d349b
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i386/kvm/xen_evtchn.c
M include/sysemu/kvm_xen.h
M target/i386/kvm/xen-emu.c
Log Message:
-----------
hw/xen: select kernel mode for per-vCPU event channel upcall vector
A guest which has configured the per-vCPU upcall vector may set the
HVM_PARAM_CALLBACK_IRQ param to fairly much anything other than zero.
For example, Linux v6.0+ after commit b1c3497e604 ("x86/xen: Add support
for HVMOP_set_evtchn_upcall_vector") will just do this after setting the
vector:
/* Trick toolstack to think we are enlightened. */
if (!cpu)
rc = xen_set_callback_via(1);
That's explicitly setting the delivery to GSI#1, but it's supposed to be
overridden by the per-vCPU vector setting. This mostly works in Qemu
*except* for the logic to enable the in-kernel handling of event channels,
which falsely determines that the kernel cannot accelerate GSI delivery
in this case.
Add a kvm_xen_has_vcpu_callback_vector() to report whether vCPU#0 has
the vector set, and use that in xen_evtchn_set_callback_param() to
enable the kernel acceleration features even when the param *appears*
to be set to target a GSI.
Preserve the Xen behaviour that when HVM_PARAM_CALLBACK_IRQ is set to
*zero* the event channel delivery is disabled completely. (Which is
what that bizarre guest behaviour is working round in the first place.)
Cc: qemu-stable@nongnu.org
Fixes: 91cce756179 ("hw/xen: Add xen_evtchn device for event channel emulation")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
Commit: 3de75ed352411899dbc9222e82fe164890c77e78
https://github.com/qemu/qemu/commit/3de75ed352411899dbc9222e82fe164890c77e78
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i386/kvm/xen_gnttab.c
Log Message:
-----------
hw/xen: don't clear map_track[] in xen_gnttab_reset()
The refcounts actually correspond to 'active_ref' structures stored in a
GHashTable per "user" on the backend side (mostly, per XenDevice).
If we zero map_track[] on reset, then when the backend drivers get torn
down and release their mapping we hit the assert(s->map_track[ref] != 0)
in gnt_unref().
So leave them in place. Each backend driver will disconnect and reconnect
as the guest comes back up again and reconnects, and it all works out OK
in the end as the old refs get dropped.
Cc: qemu-stable@nongnu.org
Fixes: de26b2619789 ("hw/xen: Implement soft reset for emulated gnttab")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
Commit: 4a5780f52095f1daf23618dc6198a2a1665ea505
https://github.com/qemu/qemu/commit/4a5780f52095f1daf23618dc6198a2a1665ea505
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i386/kvm/xen_xenstore.c
Log Message:
-----------
hw/xen: fix XenStore watch delivery to guest
When fire_watch_cb() found the response buffer empty, it would call
deliver_watch() to generate the XS_WATCH_EVENT message in the response
buffer and send an event channel notification to the guest… without
actually *copying* the response buffer into the ring. So there was
nothing for the guest to see. The pending response didn't actually get
processed into the ring until the guest next triggered some activity
from its side.
Add the missing call to put_rsp().
It might have been slightly nicer to call xen_xenstore_event() here,
which would *almost* have worked. Except for the fact that it calls
xen_be_evtchn_pending() to check that it really does have an event
pending (and clear the eventfd for next time). And under Xen it's
defined that setting that fd to O_NONBLOCK isn't guaranteed to work,
so the emu implementation follows suit.
This fixes Xen device hot-unplug.
Cc: qemu-stable@nongnu.org
Fixes: 0254c4d19df ("hw/xen: Add xenstore wire implementation and
implementation stubs")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
Commit: debc995e883b05c2fd02fb797a61ab1328e5bae2
https://github.com/qemu/qemu/commit/debc995e883b05c2fd02fb797a61ab1328e5bae2
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i386/kvm/xen_evtchn.c
Log Message:
-----------
hw/xen: take iothread mutex in xen_evtchn_reset_op()
The xen_evtchn_soft_reset() function requires the iothread mutex, but is
also called for the EVTCHNOP_reset hypercall. Ensure the mutex is taken
in that case.
Cc: qemu-stable@nongnu.org
Fixes: a15b10978fe6 ("hw/xen: Implement EVTCHNOP_reset")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
Commit: a1c1082908dde4867b1ac55f546bea0c17d52318
https://github.com/qemu/qemu/commit/a1c1082908dde4867b1ac55f546bea0c17d52318
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/block/xen-block.c
Log Message:
-----------
hw/xen: use correct default protocol for xen-block on x86
Even on x86_64 the default protocol is the x86-32 one if the guest doesn't
specifically ask for x86-64.
Cc: qemu-stable@nongnu.org
Fixes: b6af8926fb85 ("xen: add implementations of xen-block connect and
disconnect functions...")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
Commit: 70dcd49418df3c62bcd0459b82bbfdd627146572
https://github.com/qemu/qemu/commit/70dcd49418df3c62bcd0459b82bbfdd627146572
Author: Zhuocheng Ding <zhuocheng.ding@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M system/cpus.c
M target/i386/cpu.c
Log Message:
-----------
system/cpus: Fix CPUState.nr_cores' calculation
>From CPUState.nr_cores' comment, it represents "number of cores within
this CPU package".
After 003f230e37d7 ("machine: Tweak the order of topology members in
struct CpuTopology"), the meaning of smp.cores changed to "the number of
cores in one die", but this commit missed to change CPUState.nr_cores'
calculation, so that CPUState.nr_cores became wrong and now it
misses to consider numbers of clusters and dies.
At present, only i386 is using CPUState.nr_cores.
But as for i386, which supports die level, the uses of CPUState.nr_cores
are very confusing:
Early uses are based on the meaning of "cores per package" (before die
is introduced into i386), and later uses are based on "cores per die"
(after die's introduction).
This difference is due to that commit a94e1428991f ("target/i386: Add
CPUID.1F generation support for multi-dies PCMachine") misunderstood
that CPUState.nr_cores means "cores per die" when calculated
CPUID.1FH.01H:EBX. After that, the changes in i386 all followed this
wrong understanding.
With the influence of 003f230e37d7 and a94e1428991f, for i386 currently
the result of CPUState.nr_cores is "cores per die", thus the original
uses of CPUState.cores based on the meaning of "cores per package" are
wrong when multiple dies exist:
1. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.01H:EBX[bits 23:16] is
incorrect because it expects "cpus per package" but now the
result is "cpus per die".
2. In cpu_x86_cpuid() of target/i386/cpu.c, for all leaves of CPUID.04H:
EAX[bits 31:26] is incorrect because they expect "cpus per package"
but now the result is "cpus per die". The error not only impacts the
EAX calculation in cache_info_passthrough case, but also impacts other
cases of setting cache topology for Intel CPU according to cpu
topology (specifically, the incoming parameter "num_cores" expects
"cores per package" in encode_cache_cpuid4()).
3. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.0BH.01H:EBX[bits
15:00] is incorrect because the EBX of 0BH.01H (core level) expects
"cpus per package", which may be different with 1FH.01H (The reason
is 1FH can support more levels. For QEMU, 1FH also supports die,
1FH.01H:EBX[bits 15:00] expects "cpus per die").
4. In cpu_x86_cpuid() of target/i386/cpu.c, when CPUID.80000001H is
calculated, here "cpus per package" is expected to be checked, but in
fact, now it checks "cpus per die". Though "cpus per die" also works
for this code logic, this isn't consistent with AMD's APM.
5. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.80000008H:ECX expects
"cpus per package" but it obtains "cpus per die".
6. In simulate_rdmsr() of target/i386/hvf/x86_emu.c, in
kvm_rdmsr_core_thread_count() of target/i386/kvm/kvm.c, and in
helper_rdmsr() of target/i386/tcg/sysemu/misc_helper.c,
MSR_CORE_THREAD_COUNT expects "cpus per package" and "cores per
package", but in these functions, it obtains "cpus per die" and
"cores per die".
On the other hand, these uses are correct now (they are added in/after
a94e1428991f):
1. In cpu_x86_cpuid() of target/i386/cpu.c, topo_info.cores_per_die
meets the actual meaning of CPUState.nr_cores ("cores per die").
2. In cpu_x86_cpuid() of target/i386/cpu.c, vcpus_per_socket (in CPUID.
04H's calculation) considers number of dies, so it's correct.
3. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.1FH.01H:EBX[bits
15:00] needs "cpus per die" and it gets the correct result, and
CPUID.1FH.02H:EBX[bits 15:00] gets correct "cpus per package".
When CPUState.nr_cores is correctly changed to "cores per package" again
, the above errors will be fixed without extra work, but the "currently"
correct cases will go wrong and need special handling to pass correct
"cpus/cores per die" they want.
Fix CPUState.nr_cores' calculation to fit the original meaning "cores
per package", as well as changing calculation of topo_info.cores_per_die,
vcpus_per_socket and CPUID.1FH.
Fixes: a94e1428991f ("target/i386: Add CPUID.1F generation support for
multi-dies PCMachine")
Fixes: 003f230e37d7 ("machine: Tweak the order of topology members in struct
CpuTopology")
Signed-off-by: Zhuocheng Ding <zhuocheng.ding@intel.com>
Co-developed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Tested-by: Babu Moger <babu.moger@amd.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20231024090323.1859210-4-zhao1.liu@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 2e65c3658ef24bd70e00121f4e41505d469d6db5
https://github.com/qemu/qemu/commit/2e65c3658ef24bd70e00121f4e41505d469d6db5
Author: Zhao Liu <zhao1.liu@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M include/hw/core/cpu.h
M target/i386/cpu.h
Log Message:
-----------
hw/cpu: Update the comments of nr_cores and nr_dies
In the nr_threads' comment, specify it represents the
number of threads in the "core" to avoid confusion.
Also add comment for nr_dies in CPUX86State.
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Babu Moger <babu.moger@amd.com>
Tested-by: Yongwei Ma <yongwei.ma@intel.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20231024090323.1859210-5-zhao1.liu@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 88cd08aafd8db888c6d4bdc2cfdabc68187c5bc8
https://github.com/qemu/qemu/commit/88cd08aafd8db888c6d4bdc2cfdabc68187c5bc8
Author: Fiona Ebner <f.ebner@proxmox.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/ide/core.c
Log Message:
-----------
hw/ide: reset: cancel async DMA operation before resetting state
If there is a pending DMA operation during ide_bus_reset(), the fact
that the IDEState is already reset before the operation is canceled
can be problematic. In particular, ide_dma_cb() might be called and
then use the reset IDEState which contains the signature after the
reset. When used to construct the IO operation this leads to
ide_get_sector() returning 0 and nsector being 1. This is particularly
bad, because a write command will thus destroy the first sector which
often contains a partition table or similar.
Traces showing the unsolicited write happening with IDEState
0x5595af6949d0 being used after reset:
> ahci_port_write ahci(0x5595af6923f0)[0]: port write [reg:PxSCTL] @ 0x2c:
> 0x00000300
> ahci_reset_port ahci(0x5595af6923f0)[0]: reset port
> ide_reset IDEstate 0x5595af6949d0
> ide_reset IDEstate 0x5595af694da8
> ide_bus_reset_aio aio_cancel
> dma_aio_cancel dbs=0x7f64600089a0
> dma_blk_cb dbs=0x7f64600089a0 ret=0
> dma_complete dbs=0x7f64600089a0 ret=0 cb=0x5595acd40b30
> ahci_populate_sglist ahci(0x5595af6923f0)[0]
> ahci_dma_prepare_buf ahci(0x5595af6923f0)[0]: prepare buf limit=512
> prepared=512
> ide_dma_cb IDEState 0x5595af6949d0; sector_num=0 n=1 cmd=DMA WRITE
> dma_blk_io dbs=0x7f6420802010 bs=0x5595ae2c6c30 offset=0 to_dev=1
> dma_blk_cb dbs=0x7f6420802010 ret=0
> (gdb) p *qiov
> $11 = {iov = 0x7f647c76d840, niov = 1, {{nalloc = 1, local_iov = {iov_base =
> 0x0,
> iov_len = 512}}, {__pad =
> "\001\000\000\000\000\000\000\000\000\000\000",
> size = 512}}}
> (gdb) bt
> #0 blk_aio_pwritev (blk=0x5595ae2c6c30, offset=0, qiov=0x7f6420802070,
> flags=0,
> cb=0x5595ace6f0b0 <dma_blk_cb>, opaque=0x7f6420802010)
> at ../block/block-backend.c:1682
> #1 0x00005595ace6f185 in dma_blk_cb (opaque=0x7f6420802010, ret=<optimized
> out>)
> at ../softmmu/dma-helpers.c:179
> #2 0x00005595ace6f778 in dma_blk_io (ctx=0x5595ae0609f0,
> sg=sg@entry=0x5595af694d00, offset=offset@entry=0, align=align@entry=512,
> io_func=io_func@entry=0x5595ace6ee30 <dma_blk_write_io_func>,
> io_func_opaque=io_func_opaque@entry=0x5595ae2c6c30,
> cb=0x5595acd40b30 <ide_dma_cb>, opaque=0x5595af6949d0,
> dir=DMA_DIRECTION_TO_DEVICE) at ../softmmu/dma-helpers.c:244
> #3 0x00005595ace6f90a in dma_blk_write (blk=0x5595ae2c6c30,
> sg=sg@entry=0x5595af694d00, offset=offset@entry=0, align=align@entry=512,
> cb=cb@entry=0x5595acd40b30 <ide_dma_cb>,
> opaque=opaque@entry=0x5595af6949d0)
> at ../softmmu/dma-helpers.c:280
> #4 0x00005595acd40e18 in ide_dma_cb (opaque=0x5595af6949d0, ret=<optimized
> out>)
> at ../hw/ide/core.c:953
> #5 0x00005595ace6f319 in dma_complete (ret=0, dbs=0x7f64600089a0)
> at ../softmmu/dma-helpers.c:107
> #6 dma_blk_cb (opaque=0x7f64600089a0, ret=0) at ../softmmu/dma-helpers.c:127
> #7 0x00005595ad12227d in blk_aio_complete (acb=0x7f6460005b10)
> at ../block/block-backend.c:1527
> #8 blk_aio_complete (acb=0x7f6460005b10) at ../block/block-backend.c:1524
> #9 blk_aio_write_entry (opaque=0x7f6460005b10) at
> ../block/block-backend.c:1594
> #10 0x00005595ad258cfb in coroutine_trampoline (i0=<optimized out>,
> i1=<optimized out>) at ../util/coroutine-ucontext.c:177
Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: simon.rowe@nutanix.com
Message-ID: <20230906130922.142845-1-f.ebner@proxmox.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: b50586c0d2f10273beabc92ccef1da126454ea23
https://github.com/qemu/qemu/commit/b50586c0d2f10273beabc92ccef1da126454ea23
Author: Fiona Ebner <f.ebner@proxmox.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M tests/qtest/ahci-test.c
Log Message:
-----------
tests/qtest: ahci-test: add test exposing reset issue with pending callback
Before commit "hw/ide: reset: cancel async DMA operation before
resetting state", this test would fail, because a reset with a
pending write operation would lead to an unsolicited write to the
first sector of the disk.
The test writes a pattern to the beginning of the disk and verifies
that it is still intact after a reset with a pending operation. It
also checks that the pending operation actually completes correctly.
Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
Message-ID: <20230906130922.142845-2-f.ebner@proxmox.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 9d9ae0f07bc5f7c7f51832c6446dd3e115531427
https://github.com/qemu/qemu/commit/9d9ae0f07bc5f7c7f51832c6446dd3e115531427
Author: Cong Liu <liucong2@kylinos.cn>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/virtio-gpu-pci-rutabaga.c
Log Message:
-----------
virtio-gpu-rutabaga: Add empty interface to fix arm64 crash
Add an empty element to the interfaces array, which is consistent with
the behavior of other devices in qemu and fixes the crash on arm64.
0 0x0000fffff5c18550 in () at /usr/lib64/libc.so.6
1 0x0000fffff6c9cd6c in g_strdup () at /usr/lib64/libglib-2.0.so.0
2 0x0000aaaaab4945d8 in g_strdup_inline (str=<optimized out>) at
/usr/include/glib-2.0/glib/gstrfuncs.h:321
3 type_new (info=info@entry=0xaaaaabc1b2c8 <virtio_gpu_rutabaga_pci_info>) at
../qom/object.c:133
4 0x0000aaaaab494f14 in type_register_internal (info=0xaaaaabc1b2c8
<virtio_gpu_rutabaga_pci_info>) at ../qom/object.c:143
5 type_register (info=0xaaaaabc1b2c8 <virtio_gpu_rutabaga_pci_info>) at
../qom/object.c:152
6 type_register_static (info=0xaaaaabc1b2c8 <virtio_gpu_rutabaga_pci_info>) at
../qom/object.c:157
7 type_register_static_array (infos=<optimized out>, nr_infos=<optimized out>)
at ../qom/object.c:165
8 0x0000aaaaab6147e8 in module_call_init (type=type@entry=MODULE_INIT_QOM) at
../util/module.c:109
9 0x0000aaaaab10a0ec in qemu_init_subsystems () at ../system/runstate.c:817
10 0x0000aaaaab10d334 in qemu_init (argc=13, argv=0xfffffffff198) at
../system/vl.c:2760
11 0x0000aaaaaae4da6c in main (argc=<optimized out>, argv=<optimized out>) at
../system/main.c:47
Signed-off-by: Cong Liu <liucong2@kylinos.cn>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20231031012515.15504-1-liucong2@kylinos.cn>
Commit: 82bb25a12c1aab4774b4dfa0746d077de99e7c0a
https://github.com/qemu/qemu/commit/82bb25a12c1aab4774b4dfa0746d077de99e7c0a
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i2c/pmbus_device.c
M include/hw/i2c/pmbus_device.h
Log Message:
-----------
hw/i2c: pmbus add support for block receive
PMBus devices can send and receive variable length data using the
block read and write format, with the first byte in the payload
denoting the length.
This is mostly used for strings and on-device logs. Devices can
respond to a block read with an empty string.
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
Message-ID: <20231023-staging-pmbus-v3-v4-1-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: cb28c57a8b388908a41b54b3fdda70e083f68409
https://github.com/qemu/qemu/commit/cb28c57a8b388908a41b54b3fdda70e083f68409
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M include/hw/i2c/pmbus_device.h
Log Message:
-----------
hw/i2c: pmbus: add vout mode bitfields
The VOUT_MODE command is described in the PMBus Specification,
Part II, Ver 1.3 Section 8.3
VOUT_MODE has a three bit mode and 4 bit parameter, the three bit
mode determines whether voltages are formatted as uint16, uint16,
VID, and Direct modes. VID and Direct modes use the remaining 5 bits
to scale the voltage readings.
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
Message-ID: <20231023-staging-pmbus-v3-v4-2-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: a6993db797d4b25671c1b3facc7783c8430c1b16
https://github.com/qemu/qemu/commit/a6993db797d4b25671c1b3facc7783c8430c1b16
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i2c/pmbus_device.c
M include/hw/i2c/pmbus_device.h
Log Message:
-----------
hw/i2c: pmbus: add fan support
PMBus devices may integrate fans whose operation is configurable
over PMBus. This commit allows the driver to read and write the
fan control registers but does not model the operation of fans.
Reviewed-by: Stephen Longfield <slongfield@google.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
Message-ID: <20231023-staging-pmbus-v3-v4-3-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 1df8f6975dd9eefad01797eb5caaf426215a28a9
https://github.com/qemu/qemu/commit/1df8f6975dd9eefad01797eb5caaf426215a28a9
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i2c/pmbus_device.c
M include/hw/i2c/pmbus_device.h
Log Message:
-----------
hw/i2c: pmbus: add VCAP register
VCAP is a register for devices with energy storage capacitors.
Reviewed-by: Benjamin Streb <bstreb@google.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
Message-ID: <20231023-staging-pmbus-v3-v4-4-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: fca294f6b468d87da8cc7848b68ef02e257eec97
https://github.com/qemu/qemu/commit/fca294f6b468d87da8cc7848b68ef02e257eec97
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M MAINTAINERS
M hw/arm/Kconfig
M hw/sensor/Kconfig
A hw/sensor/adm1266.c
M hw/sensor/meson.build
Log Message:
-----------
hw/sensor: add ADM1266 device model
The ADM1266 is a cascadable super sequencer with margin control and
fault recording.
This commit adds basic support for its PMBus commands and models
the identification registers that can be modified in a firmware
update.
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
[PMD: Cover file in MAINTAINERS]
Message-ID: <20231023-staging-pmbus-v3-v4-5-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 8015694ed81d4a9e21beea32b77bab03095b20aa
https://github.com/qemu/qemu/commit/8015694ed81d4a9e21beea32b77bab03095b20aa
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M MAINTAINERS
A tests/qtest/adm1266-test.c
M tests/qtest/meson.build
Log Message:
-----------
tests/qtest: add tests for ADM1266
The ADM1266 can have string fields written by the driver, so
it's worth specifically testing.
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
[PMD: Cover file in MAINTAINERS]
Message-ID: <20231023-staging-pmbus-v3-v4-6-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 00b725f22fa45693808c4b5e216ed66a7605b45e
https://github.com/qemu/qemu/commit/00b725f22fa45693808c4b5e216ed66a7605b45e
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i2c/pmbus_device.c
Log Message:
-----------
hw/i2c: pmbus: immediately clear faults on request
The probing process of the generic pmbus driver generates
faults to determine if functions are available. These faults
were not always cleared resulting in probe failures.
Reviewed-by: Patrick Venture <venture@google.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
Message-ID: <20231023-staging-pmbus-v3-v4-7-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 909a2ce49b9f54c1d1521957b9ca7f86a98d9fc5
https://github.com/qemu/qemu/commit/909a2ce49b9f54c1d1521957b9ca7f86a98d9fc5
Author: Titus Rwantare <titusr@google.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i2c/pmbus_device.c
M tests/qtest/max34451-test.c
Log Message:
-----------
hw/i2c: pmbus: reset page register for out of range reads
The linux pmbus driver scans all possible pages and does not reset the
current page after the scan, making all future page reads fail as out of range
on devices with a single page.
This change resets out of range pages immediately on write.
Also added a qtest for simultaneous writes to all pages.
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
Message-ID: <20231023-staging-pmbus-v3-v4-8-07a8cb7cd20a@google.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 90c9044b6231bd756b7465bc7ac84136a6092816
https://github.com/qemu/qemu/commit/90c9044b6231bd756b7465bc7ac84136a6092816
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add include/hw/timer/tmu012.h to the SH4 R2D section
tmu012.h is the header that belongs to hw/timer/sh_timer.c, so we
should list it in the same section as sh_timer.c.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-ID: <20231026080011.156325-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 661f9f20e2e8536e1b4641dbfde34520d5daf89f
https://github.com/qemu/qemu/commit/661f9f20e2e8536e1b4641dbfde34520d5daf89f
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add the CAN documentation file to the CAN section
Add can.rst to the corresponding section in MAINTAINERS, so that
the maintainers get CC:-ed on corresponding patches.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Vikram Garhwal <vikram.garhwal@amd.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Message-ID: <20231027060931.242491-1-thuth@redhat.com>
[PMD: Fixed typo in subject]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 3cb98c83c458f82850c6090089594a1fe518d321
https://github.com/qemu/qemu/commit/3cb98c83c458f82850c6090089594a1fe518d321
Author: Daniel P. Berrangé <berrange@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: update libvirt devel mailing list address
Effective immediately, the libvirt project has moved its list off
libvir-list@redhat.com, to devel@lists.libvirt.org
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20231027095643.2842382-1-berrange@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 3068b3a9e0c05b78c5f2deb2eee9ebe02404748f
https://github.com/qemu/qemu/commit/3068b3a9e0c05b78c5f2deb2eee9ebe02404748f
Author: Adrian Wowk <dev@adrianwowk.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M ui/sdl2.c
Log Message:
-----------
ui/sdl2: use correct key names in win title on mac
Previously, when using the SDL2 UI on MacOS, the title bar uses incorrect
key names (such as Ctrl and Alt instead of the standard MacOS key symbols
like ⌃ and ⌥). This commit changes sdl_update_caption in ui/sdl2.c to
use the correct symbols when compiling for MacOS (CONFIG_DARWIN is
defined).
Unfortunately, standard Mac keyboards do not include a "Right-Ctrl" key,
so in the case that the SDL grab mode is set to HOT_KEY_MOD_RCTRL, the
default text is still used.
Signed-off-by: Adrian Wowk <dev@adrianwowk.com>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231030024119.28342-1-dev@adrianwowk.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: f7ecde051dd73fad8265e83c26ea69ae0a86e1d4
https://github.com/qemu/qemu/commit/f7ecde051dd73fad8265e83c26ea69ae0a86e1d4
Author: BALATON Zoltan <balaton@eik.bme.hu>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/ati.c
M hw/display/ati_dbg.c
M hw/display/ati_regs.h
Log Message:
-----------
ati-vga: Fix aperture sizes
Apparently these should be half the memory region sizes confirmed at
least by Radeon FCocde ROM while Rage 128 Pro ROMs don't seem to use
these. Linux r100 DRM driver also checks for a bit in HOST_PATH_CNTL
so we also add that even though the FCode ROM does not seem to set it.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID:
<d077d4f90d19db731df78da6f05058db074cada1.1698871239.git.balaton@eik.bme.hu>
Commit: e876b3400a01c5f3947de34d6c10388f43192dc9
https://github.com/qemu/qemu/commit/e876b3400a01c5f3947de34d6c10388f43192dc9
Author: BALATON Zoltan <balaton@eik.bme.hu>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/ati.c
Log Message:
-----------
ati-vga: Support unaligned access to GPIO DDC registers
The GPIO_VGA_DDC and GPIO_DVI_DDC registers are used on Radeon for DDC
access. Some drivers like the PPC Mac FCode ROM uses unaligned writes
to these registers so implement this the same way as already done for
GPIO_MONID which is used the same way for the Rage 128 Pro.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID:
<dff6ce16ccabdfd54ffda348bf57c6d8b810cd98.1698871239.git.balaton@eik.bme.hu>
Commit: bf9ac62a92ac087e44958ec18f795edfd2bf020a
https://github.com/qemu/qemu/commit/bf9ac62a92ac087e44958ec18f795edfd2bf020a
Author: BALATON Zoltan <balaton@eik.bme.hu>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/ati.c
M hw/display/ati_dbg.c
M hw/display/ati_int.h
M hw/display/ati_regs.h
Log Message:
-----------
ati-vga: Add 30 bit palette access register
Radeon cards have a 30 bit DAC and corresponding palette register to
access it. We only use 8 bits but let the guests use 10 bit color
values for those that access it through this register.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID:
<9fa19eec95d1563cc65853cf26912f230c702b32.1698871239.git.balaton@eik.bme.hu>
Commit: 08730ee0cc01c3fceb907a93436d15170a7556c4
https://github.com/qemu/qemu/commit/08730ee0cc01c3fceb907a93436d15170a7556c4
Author: BALATON Zoltan <balaton@eik.bme.hu>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/ati.c
M hw/display/ati_2d.c
M hw/display/ati_int.h
Log Message:
-----------
ati-vga: Implement fallback for pixman routines
Pixman routines can fail if no implementation is available and it will
become optional soon so add fallbacks when pixman does not work.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID:
<ed0fba3f74e48143f02228b83bf8796ca49f3e7d.1698871239.git.balaton@eik.bme.hu>
Commit: 9c549ab6895a43ad0cb33e684e11cdb0b5400897
https://github.com/qemu/qemu/commit/9c549ab6895a43ad0cb33e684e11cdb0b5400897
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/virtio-gpu.c
Log Message:
-----------
virtio-gpu: block migration of VMs with blob=true
"blob" resources don't have an associated pixman image:
#0 pixman_image_get_stride (image=0x0) at ../pixman/pixman-image.c:921
#1 0x0000562327c25236 in virtio_gpu_save (f=0x56232bb13b00,
opaque=0x56232b555a60, size=0, field=0x5623289ab6c8 <__compound_literal.3+104>,
vmdesc=0x56232ab59fe0) at ../hw/display/virtio-gpu.c:1225
Related to:
https://bugzilla.redhat.com/show_bug.cgi?id=2236353
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Commit: e92ffae6ba28f27329752017b59b6133af27d6da
https://github.com/qemu/qemu/commit/e92ffae6ba28f27329752017b59b6133af27d6da
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/virtio-gpu.c
Log Message:
-----------
virtio-gpu: factor out restore mapping
The same function is going to be used next to restore "blob" resources.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Commit: 0f2a301db322a7636edf9a759deb46dd8caa8824
https://github.com/qemu/qemu/commit/0f2a301db322a7636edf9a759deb46dd8caa8824
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/virtio-gpu.c
Log Message:
-----------
virtio-gpu: move scanout restoration to post_load
As we are going to introduce an extra subsection for "blob" resources,
scanout have to be restored after.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Commit: 54876d25fe298e0761556253f1c07af6160d5c10
https://github.com/qemu/qemu/commit/54876d25fe298e0761556253f1c07af6160d5c10
Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/ppc/spapr_pci_vfio.c
M hw/vfio/ap.c
M hw/vfio/ccw.c
M hw/vfio/common.c
M hw/vfio/container.c
M hw/vfio/helpers.c
R include/hw/vfio/vfio.h
Log Message:
-----------
vfio/container: Move IBM EEH related functions into spapr_pci_vfio.c
With vfio_eeh_as_ok/vfio_eeh_as_op moved and made static,
vfio.h becomes empty and is deleted.
No functional changes intended.
Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Acked-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 521c8f4ebc5923576436228211f8947f306b9d82
https://github.com/qemu/qemu/commit/521c8f4ebc5923576436228211f8947f306b9d82
Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/vfio/container.c
M hw/vfio/spapr.c
Log Message:
-----------
vfio/container: Move vfio_container_add/del_section_window into spapr.c
vfio_container_add/del_section_window are spapr specific functions,
so move them into spapr.c to make container.c cleaner.
No functional changes intended.
Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 770c3b6e431e5160b81f889ccb76c07dcfeb5da5
https://github.com/qemu/qemu/commit/770c3b6e431e5160b81f889ccb76c07dcfeb5da5
Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/vfio/container.c
M hw/vfio/spapr.c
M include/hw/vfio/vfio-common.h
Log Message:
-----------
vfio/container: Move spapr specific init/deinit into spapr.c
Move spapr specific init/deinit code into spapr.c and wrap
them with vfio_spapr_container_init/deinit, this way footprint
of spapr is further reduced, vfio_prereg_listener could also
be made static.
vfio_listener_release is unnecessary when prereg_listener is
moved out, so have it removed.
No functional changes intended.
Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: a17879f0e2e82c5e85440eb1c3e8a3eeef469a3e
https://github.com/qemu/qemu/commit/a17879f0e2e82c5e85440eb1c3e8a3eeef469a3e
Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/vfio/spapr.c
M include/hw/vfio/vfio-common.h
Log Message:
-----------
vfio/spapr: Make vfio_spapr_create/remove_window static
vfio_spapr_create_window calls vfio_spapr_remove_window,
With reoder of definition of the two, we can make
vfio_spapr_create/remove_window static.
No functional changes intended.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: a2347c60a86a7c2a227ebab186a195d16e1e3901
https://github.com/qemu/qemu/commit/a2347c60a86a7c2a227ebab186a195d16e1e3901
Author: Zhenzhong Duan <zhenzhong.duan@intel.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/vfio/common.c
M hw/vfio/container.c
M hw/vfio/spapr.c
M include/hw/vfio/vfio-common.h
Log Message:
-----------
vfio/common: Move vfio_host_win_add/del into spapr.c
Only spapr supports a customed host window list, other vfio driver
assume 64bit host window. So remove the check in listener callback
and move vfio_host_win_add/del into spapr.c and make it static.
With the check removed, we still need to do the same check for
VFIO_SPAPR_TCE_IOMMU which allows a single host window range
[dma32_window_start, dma32_window_size). Move vfio_find_hostwin
into spapr.c and do same check in vfio_container_add_section_window
instead.
When mapping a ram device section, if it's unaligned with
hostwin->iova_pgsizes, this mapping is bypassed. With hostwin
moved into spapr, we changed to check container->pgsizes.
Suggested-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Commit: 2d7f1081864790eb1000e6ef34e202dae66a03d2
https://github.com/qemu/qemu/commit/2d7f1081864790eb1000e6ef34e202dae66a03d2
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/virtio/virtio-pmem.c
Log Message:
-----------
Revert "hw/virtio/virtio-pmem: Replace impossible check by assertion"
This reverts commit 5960f254dbb46f0c7a9f5f44bf4d27c19c34cb97 since the
previous commit made this situation possible again.
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: eb1b7c4bd4135648a96449d4607063e80692fd0c
https://github.com/qemu/qemu/commit/eb1b7c4bd4135648a96449d4607063e80692fd0c
Author: David Hildenbrand <david@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/mem/memory-device.c
Log Message:
-----------
memory-device: Drop size alignment check
There is no strong requirement that the size has to be multiples of the
requested alignment, let's drop it. This is a preparation for hv-baloon.
Signed-off-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: 4f80cd2f033e73bb65adf69bd337ae3052629fdf
https://github.com/qemu/qemu/commit/4f80cd2f033e73bb65adf69bd337ae3052629fdf
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
A include/hw/hyperv/dynmem-proto.h
Log Message:
-----------
Add Hyper-V Dynamic Memory Protocol definitions
This commit adds Hyper-V Dynamic Memory Protocol definitions, taken
from hv_balloon Linux kernel driver, adapted to the QEMU coding style and
definitions.
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: 0d9e8c0b670b7856d36ed155d43548d2491230e7
https://github.com/qemu/qemu/commit/0d9e8c0b670b7856d36ed155d43548d2491230e7
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M Kconfig.host
M hw/hyperv/Kconfig
A hw/hyperv/hv-balloon-internal.h
A hw/hyperv/hv-balloon-page_range_tree.c
A hw/hyperv/hv-balloon-page_range_tree.h
A hw/hyperv/hv-balloon.c
M hw/hyperv/meson.build
M hw/hyperv/trace-events
A include/hw/hyperv/hv-balloon.h
M meson.build
M meson_options.txt
M scripts/meson-buildoptions.sh
Log Message:
-----------
Add Hyper-V Dynamic Memory Protocol driver (hv-balloon) base
This driver is like virtio-balloon on steroids: it allows both changing the
guest memory allocation via ballooning and (in the next patch) inserting
pieces of extra RAM into it on demand from a provided memory backend.
The actual resizing is done via ballooning interface (for example, via
the "balloon" HMP command).
This includes resizing the guest past its boot size - that is, hot-adding
additional memory in granularity limited only by the guest alignment
requirements, as provided by the next patch.
In contrast with ACPI DIMM hotplug where one can only request to unplug a
whole DIMM stick this driver allows removing memory from guest in single
page (4k) units via ballooning.
After a VM reboot the guest is back to its original (boot) size.
In the future, the guest boot memory size might be changed on reboot
instead, taking into account the effective size that VM had before that
reboot (much like Hyper-V does).
For performance reasons, the guest-released memory is tracked in a few
range trees, as a series of (start, count) ranges.
Each time a new page range is inserted into such tree its neighbors are
checked as candidates for possible merging with it.
Besides performance reasons, the Dynamic Memory protocol itself uses page
ranges as the data structure in its messages, so relevant pages need to be
merged into such ranges anyway.
One has to be careful when tracking the guest-released pages, since the
guest can maliciously report returning pages outside its current address
space, which later clash with the address range of newly added memory.
Similarly, the guest can report freeing the same page twice.
The above design results in much better ballooning performance than when
using virtio-balloon with the same guest: 230 GB / minute with this driver
versus 70 GB / minute with virtio-balloon.
During a ballooning operation most of time is spent waiting for the guest
to come up with newly freed page ranges, processing the received ranges on
the host side (in QEMU and KVM) is nearly instantaneous.
The unballoon operation is also pretty much instantaneous:
thanks to the merging of the ballooned out page ranges 200 GB of memory can
be returned to the guest in about 1 second.
With virtio-balloon this operation takes about 2.5 minutes.
These tests were done against a Windows Server 2019 guest running on a
Xeon E5-2699, after dirtying the whole memory inside guest before each
balloon operation.
Using a range tree instead of a bitmap to track the removed memory also
means that the solution scales well with the guest size: even a 1 TB range
takes just a few bytes of such metadata.
Since the required GTree operations aren't present in every Glib version
a check for them was added to the meson build script, together with new
"--enable-hv-balloon" and "--disable-hv-balloon" configure arguments.
If these GTree operations are missing in the system's Glib version this
driver will be skipped during QEMU build.
An optional "status-report=on" device parameter requests memory status
events from the guest (typically sent every second), which allow the host
to learn both the guest memory available and the guest memory in use
counts.
Following commits will add support for their external emission as
"HV_BALLOON_STATUS_REPORT" QMP events.
The driver is named hv-balloon since the Linux kernel client driver for
the Dynamic Memory Protocol is named as such and to follow the naming
pattern established by the virtio-balloon driver.
The whole protocol runs over Hyper-V VMBus.
The driver was tested against Windows Server 2012 R2, Windows Server 2016
and Windows Server 2019 guests and obeys the guest alignment requirements
reported to the host via DM_CAPABILITIES_REPORT message.
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: 99a4706ae81efa51b21871af643626730a6719d4
https://github.com/qemu/qemu/commit/99a4706ae81efa51b21871af643626730a6719d4
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
A hw/hyperv/hv-balloon-our_range_memslots.c
A hw/hyperv/hv-balloon-our_range_memslots.h
M hw/hyperv/hv-balloon.c
M hw/hyperv/meson.build
M hw/hyperv/trace-events
Log Message:
-----------
Add Hyper-V Dynamic Memory Protocol driver (hv-balloon) hot-add support
One of advantages of using this protocol over ACPI-based PC DIMM hotplug is
that it allows hot-adding memory in much smaller granularity because the
ACPI DIMM slot limit does not apply.
In order to enable this functionality a new memory backend needs to be
created and provided to the driver via the "memdev" parameter.
This can be achieved by, for example, adding
"-object memory-backend-ram,id=mem1,size=32G" to the QEMU command line and
then instantiating the driver with "memdev=mem1" parameter.
The device will try to use multiple memslots to cover the memory backend in
order to reduce the size of metadata for the not-yet-hot-added part of the
memory backend.
Co-developed-by: David Hildenbrand <david@redhat.com>
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: 16dff2f9bb877bd1e147b5c5d9966d5a1d336c8c
https://github.com/qemu/qemu/commit/16dff2f9bb877bd1e147b5c5d9966d5a1d336c8c
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/core/machine-hmp-cmds.c
M hw/hyperv/hv-balloon.c
M qapi/machine.json
Log Message:
-----------
qapi: Add query-memory-devices support to hv-balloon
Used by the driver to report its provided memory state information.
Co-developed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: 259ebed45a2cd2ae6a5820fbc2e51578d2ad4eb7
https://github.com/qemu/qemu/commit/259ebed45a2cd2ae6a5820fbc2e51578d2ad4eb7
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
A hw/hyperv/hv-balloon-stub.c
M hw/hyperv/hv-balloon.c
M hw/hyperv/meson.build
M monitor/monitor.c
M qapi/machine.json
M tests/qtest/qmp-cmd-test.c
Log Message:
-----------
qapi: Add HV_BALLOON_STATUS_REPORT event and its QMP query command
Used by the hv-balloon driver for (optional) guest memory status reports.
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: 9a52aa40dc039c2e047d86886a2f66ce03e2b98c
https://github.com/qemu/qemu/commit/9a52aa40dc039c2e047d86886a2f66ce03e2b98c
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i386/Kconfig
M hw/i386/pc.c
Log Message:
-----------
hw/i386/pc: Support hv-balloon
Add the necessary plumbing for the hv-balloon driver to the PC machine.
Co-developed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: 00313b517d09c0b141fb32997791f911c28fd3ff
https://github.com/qemu/qemu/commit/00313b517d09c0b141fb32997791f911c28fd3ff
Author: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add an entry for Hyper-V Dynamic Memory Protocol
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Commit: f66767f75c9c2ddebbf17aab37bfd752716a96b8
https://github.com/qemu/qemu/commit/f66767f75c9c2ddebbf17aab37bfd752716a96b8
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/virtio-gpu.c
Log Message:
-----------
virtio-gpu: add virtio-gpu/blob vmstate subsection
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Commit: 10b9ddbc83b94986cbdf989e26fb7269fb2e9f72
https://github.com/qemu/qemu/commit/10b9ddbc83b94986cbdf989e26fb7269fb2e9f72
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/display/virtio-gpu.c
Log Message:
-----------
Revert "virtio-gpu: block migration of VMs with blob=true"
If we decide to apply this patch (for easier backporting reasons), we
can now revert it.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Commit: fa68ecb330dbdfeefa7f4d11e30c939da13853b0
https://github.com/qemu/qemu/commit/fa68ecb330dbdfeefa7f4d11e30c939da13853b0
Author: Sebastian Ott <sebott@redhat.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/arm/virt.c
Log Message:
-----------
hw/arm/virt: fix PMU IRQ registration
Since commit 9036e917f8 ("{include/}hw/arm: refactor virt PPI logic")
PMU IRQ registration fails for arm64 guests:
[ 0.563689] hw perfevents: unable to request IRQ14 for ARM PMU counters
[ 0.565160] armv8-pmu: probe of pmu failed with error -22
That commit re-defined VIRTUAL_PMU_IRQ to be a INTID but missed a case
where the PMU IRQ is actually referred by its PPI index. Fix that by using
INTID_TO_PPI() in that case.
Fixes: 9036e917f8 ("{include/}hw/arm: refactor virt PPI logic")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1960
Signed-off-by: Sebastian Ott <sebott@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 475d918d-ab0e-f717-7206-57a5beb28c7b@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 1eb2888ecd55ace57b37009492f11cd53a6f4148
https://github.com/qemu/qemu/commit/1eb2888ecd55ace57b37009492f11cd53a6f4148
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/qtest/bios-tables-test: Allow changes to virt SPCR and DBG2
Allow changes to the virt board SPCR and DBG2 -- we are going to fix
an error in the UART descriptions there.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 41f7b58b634ec3b60ae874375d2bbb61d790971e
https://github.com/qemu/qemu/commit/41f7b58b634ec3b60ae874375d2bbb61d790971e
Author: Udo Steinberg <udo@hypervisor.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/arm/virt-acpi-build.c
Log Message:
-----------
hw/arm/virt: Report correct register sizes in ACPI DBG2/SPCR tables.
Documentation for using the GAS in ACPI tables to report debug UART addresses at
https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table
states the following:
- The Register Bit Width field contains the register stride and must be a
power of 2 that is at least as large as the access size. On 32-bit
platforms this value cannot exceed 32. On 64-bit platforms this value
cannot exceed 64.
- The Access Size field is used to determine whether byte, WORD, DWORD, or
QWORD accesses are to be used. QWORD accesses are only valid on 64-bit
architectures.
Documentation for the ARM PL011 at
https://developer.arm.com/documentation/ddi0183/latest/
states that the registers are:
- spaced 4 bytes apart (see Table 3-2), so register stride must be 32.
- 16 bits in size in some cases (see individual registers), so access
size must be at least 2.
Linux doesn't seem to care about this error in the table, but it does
affect at least the NOVA microhypervisor.
In theory we therefore have a choice between reporting the access
size as 2 (16 bit accesses) or 3 (32-bit accesses). In practice,
Linux does not correctly handle the case where the table reports the
access size as 2: as of kernel commit 750b95887e5678, the code in
acpi_parse_spcr() tries to tell the serial driver to use 16 bit
accesses by passing "mmio16" in the option string, but the PL011
driver code in pl011_console_match() only recognizes "mmio" or
"mmio32". The result is that unless the user has enabled 'earlycon'
there is no console output from the guest kernel.
We therefore choose to report the access size as 32 bits; this works
for NOVA and also for Linux. It is also what the UEFI firmware on a
Raspberry Pi 4 reports, so we're in line with existing real-world
practice.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1938
Signed-off-by: Udo Steinberg <udo@hypervisor.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: minor commit message tweaks; use 32 bit accesses]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 806f71eecf643d029099e57fae2199f678845d98
https://github.com/qemu/qemu/commit/806f71eecf643d029099e57fae2199f678845d98
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M tests/data/acpi/virt/DBG2
M tests/data/acpi/virt/SPCR
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/qtest/bios-tables-test: Update virt SPCR and DBG2 golden references
Update the virt SPCR and DBG2 golden reference files to have the
fix for the description of the UART.
Diffs from iasl:
@@ -1,57 +1,57 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/SPCR, Fri Nov 3 14:12:06 2023
+ * Disassembly of /tmp/aml-E6YUD2, Fri Nov 3 14:12:06 2023
*
* ACPI Data Table [SPCR]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "SPCR" [Serial Port Console
Redirection table]
[004h 0004 4] Table Length : 00000050
[008h 0008 1] Revision : 02
-[009h 0009 1] Checksum : CB
+[009h 0009 1] Checksum : B1
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 1] Interface Type : 03
[025h 0037 3] Reserved : 000000
[028h 0040 12] Serial Port Register : [Generic Address Structure]
[028h 0040 1] Space ID : 00 [SystemMemory]
-[029h 0041 1] Bit Width : 08
+[029h 0041 1] Bit Width : 20
[02Ah 0042 1] Bit Offset : 00
-[02Bh 0043 1] Encoded Access Width : 01 [Byte Access:8]
+[02Bh 0043 1] Encoded Access Width : 03 [DWord Access:32]
[02Ch 0044 8] Address : 0000000009000000
[034h 0052 1] Interrupt Type : 08
[035h 0053 1] PCAT-compatible IRQ : 00
[036h 0054 4] Interrupt : 00000021
[03Ah 0058 1] Baud Rate : 03
[03Bh 0059 1] Parity : 00
[03Ch 0060 1] Stop Bits : 01
[03Dh 0061 1] Flow Control : 02
[03Eh 0062 1] Terminal Type : 00
[04Ch 0076 1] Reserved : 00
[040h 0064 2] PCI Device ID : FFFF
[042h 0066 2] PCI Vendor ID : FFFF
[044h 0068 1] PCI Bus : 00
[045h 0069 1] PCI Device : 00
[046h 0070 1] PCI Function : 00
[047h 0071 4] PCI Flags : 00000000
[04Bh 0075 1] PCI Segment : 00
[04Ch 0076 4] Reserved : 00000000
Raw Table Data: Length 80 (0x50)
- 0000: 53 50 43 52 50 00 00 00 02 CB 42 4F 43 48 53 20 // SPCRP.....BOCHS
+ 0000: 53 50 43 52 50 00 00 00 02 B1 42 4F 43 48 53 20 // SPCRP.....BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
- 0020: 01 00 00 00 03 00 00 00 00 08 00 01 00 00 00 09 // ................
+ 0020: 01 00 00 00 03 00 00 00 00 20 00 03 00 00 00 09 // ......... ......
0030: 00 00 00 00 08 00 21 00 00 00 03 00 01 02 00 00 // ......!.........
0040: FF FF FF FF 00 00 00 00 00 00 00 00 00 00 00 00 // ................
@@ -1,57 +1,57 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
- * Disassembly of tests/data/acpi/virt/DBG2, Fri Nov 3 14:12:06 2023
+ * Disassembly of /tmp/aml-V1YUD2, Fri Nov 3 14:12:06 2023
*
* ACPI Data Table [DBG2]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "DBG2" [Debug Port table
type 2]
[004h 0004 4] Table Length : 00000057
[008h 0008 1] Revision : 00
-[009h 0009 1] Checksum : CF
+[009h 0009 1] Checksum : B5
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPC "
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Info Offset : 0000002C
[028h 0040 4] Info Count : 00000001
[02Ch 0044 1] Revision : 00
[02Dh 0045 2] Length : 002B
[02Fh 0047 1] Register Count : 01
[030h 0048 2] Namepath Length : 0005
[032h 0050 2] Namepath Offset : 0026
[034h 0052 2] OEM Data Length : 0000 [Optional field not
present]
[036h 0054 2] OEM Data Offset : 0000 [Optional field not
present]
[038h 0056 2] Port Type : 8000
[03Ah 0058 2] Port Subtype : 0003
[03Ch 0060 2] Reserved : 0000
[03Eh 0062 2] Base Address Offset : 0016
[040h 0064 2] Address Size Offset : 0022
[042h 0066 12] Base Address Register : [Generic Address Structure]
[042h 0066 1] Space ID : 00 [SystemMemory]
-[043h 0067 1] Bit Width : 08
+[043h 0067 1] Bit Width : 20
[044h 0068 1] Bit Offset : 00
-[045h 0069 1] Encoded Access Width : 01 [Byte Access:8]
+[045h 0069 1] Encoded Access Width : 03 [DWord Access:32]
[046h 0070 8] Address : 0000000009000000
[04Eh 0078 4] Address Size : 00001000
[052h 0082 5] Namepath : "COM0"
Raw Table Data: Length 87 (0x57)
- 0000: 44 42 47 32 57 00 00 00 00 CF 42 4F 43 48 53 20 // DBG2W.....BOCHS
+ 0000: 44 42 47 32 57 00 00 00 00 B5 42 4F 43 48 53 20 // DBG2W.....BOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC
0020: 01 00 00 00 2C 00 00 00 01 00 00 00 00 2B 00 01 // ....,........+..
0030: 05 00 26 00 00 00 00 00 00 80 03 00 00 00 16 00 // ..&.............
- 0040: 22 00 00 08 00 01 00 00 00 09 00 00 00 00 00 10 // "...............
+ 0040: 22 00 00 20 00 03 00 00 00 09 00 00 00 00 00 10 // ".. ............
0050: 00 00 43 4F 4D 30 00 // ..COM0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 212c5fe1914a192b01f337b7392fca75a7ab4071
https://github.com/qemu/qemu/commit/212c5fe1914a192b01f337b7392fca75a7ab4071
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/i386/intel_iommu.c
Log Message:
-----------
hw/i386/intel_iommu: vtd_slpte_nonzero_rsvd(): assert no overflow
We support only 3- and 4-level page-tables, which is firstly checked in
vtd_decide_config(), then setup in vtd_init(). Than level fields are
checked by vtd_is_level_supported().
So here we can't have level out from 1..4 inclusive range. Let's assert
it. That also explains Coverity that we are not going to overflow the
array.
CID: 1487158, 1487186
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-id: 20231017125941.810461-2-vsementsov@yandex-team.ru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 2e12dd405c6607b4f4566d4a93b79422213ba6a3
https://github.com/qemu/qemu/commit/2e12dd405c6607b4f4566d4a93b79422213ba6a3
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M util/filemonitor-inotify.c
Log Message:
-----------
util/filemonitor-inotify: qemu_file_monitor_watch(): assert no overflow
Prefer clear assertions instead of [im]possible array overflow.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-id: 20231017125941.810461-3-vsementsov@yandex-team.ru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 394bca2fa443cd1c1c3dad931fcce4fa96f88941
https://github.com/qemu/qemu/commit/394bca2fa443cd1c1c3dad931fcce4fa96f88941
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/rtc/mc146818rtc.c
Log Message:
-----------
mc146818rtc: rtc_set_time(): initialize tm to zeroes
set_time() function doesn't set all the fields, so it's better to
initialize tm structure. And Coverity will be happier about it.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-id: 20231017125941.810461-4-vsementsov@yandex-team.ru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: cc8fb0c3ae3c950eb40e969607e17ff16a7519ac
https://github.com/qemu/qemu/commit/cc8fb0c3ae3c950eb40e969607e17ff16a7519ac
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M block/nvme.c
Log Message:
-----------
block/nvme: nvme_process_completion() fix bound for cid
NVMeQueuePair::reqs has length NVME_NUM_REQS, which less than
NVME_QUEUE_SIZE by 1.
Fixes: 1086e95da17050 ("block/nvme: switch to a NVMeRequest freelist")
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-id: 20231017125941.810461-5-vsementsov@yandex-team.ru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 59a3aff685fdb930244c7aa439e121b60e50f266
https://github.com/qemu/qemu/commit/59a3aff685fdb930244c7aa439e121b60e50f266
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M hw/core/loader.c
Log Message:
-----------
hw/core/loader: gunzip(): initialize z_stream
Coverity signals that variable as being used uninitialized. And really,
when work with external APIs that's better to zero out the structure,
where we set some fields by hand.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-id: 20231017125941.810461-6-vsementsov@yandex-team.ru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 35bafa95da671f5a902e87fcc301f76f82cd0831
https://github.com/qemu/qemu/commit/35bafa95da671f5a902e87fcc301f76f82cd0831
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M io/channel-socket.c
Log Message:
-----------
io/channel-socket: qio_channel_socket_flush(): improve msg validation
For SO_EE_ORIGIN_ZEROCOPY the 32-bit notification range is encoded
as [ee_info, ee_data] inclusively, so ee_info should be less or
equal to ee_data.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-id: 20231017125941.810461-7-vsementsov@yandex-team.ru
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 13edcf591e74fd8a0e69f01b8b09f53397562103
https://github.com/qemu/qemu/commit/13edcf591e74fd8a0e69f01b8b09f53397562103
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M docs/system/arm/vexpress.rst
M hw/arm/vexpress.c
Log Message:
-----------
hw/arm/vexpress-a9: Remove useless mapping of RAM at address 0
On the vexpress-a9 board we try to map both RAM and flash to address 0,
as seen in "info mtree":
address-space: memory
0000000000000000-ffffffffffffffff (prio 0, i/o): system
0000000000000000-0000000003ffffff (prio 0, romd): alias vexpress.flashalias
@vexpress.flash0 0000000000000000-0000000003ffffff
0000000000000000-0000000003ffffff (prio 0, ram): alias vexpress.lowmem
@vexpress.highmem 0000000000000000-0000000003ffffff
0000000010000000-0000000010000fff (prio 0, i/o): arm-sysctl
0000000010004000-0000000010004fff (prio 0, i/o): pl041
(etc)
The flash "wins" and the RAM mapping is useless (but also harmless).
This happened as a result of commit 6ec1588e in 2014, which changed
"we always map the RAM to the low addresses for vexpress-a9" to "we
always map flash in the low addresses", but forgot to stop mapping
the RAM.
In real hardware, this low part of memory is remappable, both at
runtime by the guest writing to a control register, and configurably
as to what you get out of reset -- you can have the first flash
device, or the second, or the DDR2 RAM, or the external AXI bus
(which for QEMU means "nothing there"). In an ideal world we would
support that remapping both at runtime and via a machine property to
select the out-of-reset behaviour.
Pending anybody caring enough to implement the full remapping
behaviour:
* remove the useless mapped-but-inaccessible lowram MR
* document that QEMU doesn't support remapping of low memory
Fixes: 6ec1588e ("hw/arm/vexpress: Alias NOR flash at 0 for vexpress-a9")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1761
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231103185602.875849-1-peter.maydell@linaro.org
Commit: 5722fc471296d5f042df4b005a851cc8008df0c9
https://github.com/qemu/qemu/commit/5722fc471296d5f042df4b005a851cc8008df0c9
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M target/arm/tcg/a64.decode
M target/arm/tcg/translate.h
Log Message:
-----------
target/arm: Fix A64 LDRA immediate decode
In commit be23a049 in the conversion to decodetree we broke the
decoding of the immediate value in the LDRA instruction. This should
be a 10 bit signed value that is scaled by 8, but in the conversion
we incorrectly ended up scaling it only by 2. Fix the scaling
factor.
Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1970
Fixes: be23a049 ("target/arm: Convert load (pointer auth) insns to decodetree")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20231106113445.1163063-1-peter.maydell@linaro.org
Commit: b2b109041ecd1095384f5be5bb9badd13c1cf286
https://github.com/qemu/qemu/commit/b2b109041ecd1095384f5be5bb9badd13c1cf286
Author: Jean-Louis Dupond <jean-louis@dupond.be>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M block/qcow2-cluster.c
M qapi/block-core.json
M qemu-options.hx
Log Message:
-----------
qcow2: keep reference on zeroize with discard-no-unref enabled
When the discard-no-unref flag is enabled, we keep the reference for
normal discard requests.
But when a discard is executed on a snapshot/qcow2 image with backing,
the discards are saved as zero clusters in the snapshot image.
When committing the snapshot to the backing file, not
discard_in_l2_slice is called but zero_in_l2_slice. Which did not had
any logic to keep the reference when discard-no-unref is enabled.
Therefor we add logic in the zero_in_l2_slice call to keep the reference
on commit.
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1621
Signed-off-by: Jean-Louis Dupond <jean-louis@dupond.be>
Message-Id: <20231003125236.216473-2-jean-louis@dupond.be>
[hreitz: Made the documentation change more verbose, as discussed
on-list]
Signed-off-by: Hanna Czenczek <hreitz@redhat.com>
Commit: 10b9e0802a074c991e1ce485631d75641d0b0f9e
https://github.com/qemu/qemu/commit/10b9e0802a074c991e1ce485631d75641d0b0f9e
Author: Sam Li <faithilikerun@gmail.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M block/file-posix.c
Log Message:
-----------
block/file-posix: fix update_zones_wp() caller
When the zoned request fail, it needs to update only the wp of
the target zones for not disrupting the in-flight writes on
these other zones. The wp is updated successfully after the
request completes.
Fixed the callers with right offset and nr_zones.
Signed-off-by: Sam Li <faithilikerun@gmail.com>
Message-Id: <20230825040556.4217-1-faithilikerun@gmail.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
[hreitz: Rebased and fixed comment spelling]
Signed-off-by: Hanna Czenczek <hreitz@redhat.com>
Commit: ad4feaca61d76fecad784e6d5e7bae40d0411c46
https://github.com/qemu/qemu/commit/ad4feaca61d76fecad784e6d5e7bae40d0411c46
Author: Naohiro Aota <nao.aota@gmail.com>
Date: 2023-11-06 (Mon, 06 Nov 2023)
Changed paths:
M block/file-posix.c
Log Message:
-----------
file-posix: fix over-writing of returning zone_append offset
raw_co_zone_append() sets "s->offset" where "BDRVRawState *s". This pointer
is used later at raw_co_prw() to save the block address where the data is
written.
When multiple IOs are on-going at the same time, a later IO's
raw_co_zone_append() call over-writes a former IO's offset address before
raw_co_prw() completes. As a result, the former zone append IO returns the
initial value (= the start address of the writing zone), instead of the
proper address.
Fix the issue by passing the offset pointer to raw_co_prw() instead of
passing it through s->offset. Also, remove "offset" from BDRVRawState as
there is no usage anymore.
Fixes: 4751d09adcc3 ("block: introduce zone append write for zoned devices")
Signed-off-by: Naohiro Aota <naohiro.aota@wdc.com>
Message-Id: <20231030073853.2601162-1-naohiro.aota@wdc.com>
Reviewed-by: Sam Li <faithilikerun@gmail.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Hanna Czenczek <hreitz@redhat.com>
Commit: 6024f728659910762e293fd5abc38dd5d8340c2e
https://github.com/qemu/qemu/commit/6024f728659910762e293fd5abc38dd5d8340c2e
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M hw/display/macfb.c
Log Message:
-----------
Merge tag 'q800-for-8.2-pull-request' of https://github.com/vivier/qemu-m68k
into staging
Q800 pull request 20231106
macfb: A/UX fixes for colour LUT
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# U638/cSVdfhs
# =F4bR
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 06 Nov 2023 16:15:16 HKT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
[full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* tag 'q800-for-8.2-pull-request' of https://github.com/vivier/qemu-m68k:
macfb: allow reads from the DAFB_LUT register
macfb: allow larger write accesses to the DAFB_LUT register
macfb: rename DAFB_RESET to DAFB_LUT_INDEX
macfb: don't clear interrupts when writing to DAFB_RESET
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 9c3c9731d939e4e5e1c4e4063b4630df47905fb7
https://github.com/qemu/qemu/commit/9c3c9731d939e4e5e1c4e4063b4630df47905fb7
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M hw/block/xen-block.c
M hw/i386/kvm/xen_evtchn.c
M hw/i386/kvm/xen_gnttab.c
M hw/i386/kvm/xen_xenstore.c
M include/sysemu/kvm_xen.h
M target/i386/kvm/xen-emu.c
Log Message:
-----------
Merge tag 'pull-xenfv-stable-20231106' of
git://git.infradead.org/users/dwmw2/qemu into staging
Bugfixes for emulated Xen support
Selected bugfixes for mainline and stable, especially to the per-vCPU
local APIC vector delivery mode for event channel notifications, which
was broken in a number of ways.
The xen-block driver has been defaulting to the wrong protocol for x86
guest, and this fixes that — which is technically an incompatible change
but I'm fairly sure nobody relies on the broken behaviour (and in
production I *have* seen guests which rely on the correct behaviour,
which now matches the blkback driver in the Linux kernel).
A handful of other simple fixes for issues which came to light as new
features (qv) were being developed.
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# gpg: Signature made Mon 06 Nov 2023 18:25:02 HKT
# gpg: using RSA key BE07D9FD54809AB2C4B0FF5F63762CDA67E2F359
# gpg: issuer "dwmw2@infradead.org"
# gpg: Good signature from "David Woodhouse <dwmw2@infradead.org>" [unknown]
# gpg: aka "David Woodhouse <dwmw2@exim.org>" [unknown]
# gpg: aka "David Woodhouse <david@woodhou.se>" [unknown]
# gpg: aka "David Woodhouse <dwmw2@kernel.org>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: BE07 D9FD 5480 9AB2 C4B0 FF5F 6376 2CDA 67E2 F359
* tag 'pull-xenfv-stable-20231106' of git://git.infradead.org/users/dwmw2/qemu:
hw/xen: use correct default protocol for xen-block on x86
hw/xen: take iothread mutex in xen_evtchn_reset_op()
hw/xen: fix XenStore watch delivery to guest
hw/xen: don't clear map_track[] in xen_gnttab_reset()
hw/xen: select kernel mode for per-vCPU event channel upcall vector
i386/xen: fix per-vCPU upcall vector for Xen emulation
i386/xen: Don't advertise XENFEAT_supervisor_mode_kernel
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: b09627bb16395722d95b3ec657ea9fa9e7e78dda
https://github.com/qemu/qemu/commit/b09627bb16395722d95b3ec657ea9fa9e7e78dda
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M MAINTAINERS
M accel/stubs/tcg-stub.c
M accel/tcg/cputlb.c
M accel/tcg/tcg-accel-ops.c
M accel/tcg/translate-all.c
M accel/tcg/user-exec-stub.c
M cpu-common.c
M cpu-target.c
M hw/arm/Kconfig
M hw/core/cpu-common.c
M hw/core/loader.c
M hw/i2c/pmbus_device.c
M hw/ide/core.c
M hw/isa/i82378.c
M hw/ppc/e500.c
M hw/sensor/Kconfig
A hw/sensor/adm1266.c
M hw/sensor/meson.build
M include/exec/cpu-common.h
M include/exec/tb-flush.h
M include/hw/core/cpu.h
M include/hw/i2c/pmbus_device.h
M include/hw/i386/topology.h
M include/hw/loader.h
M include/sysemu/accel-ops.h
M include/sysemu/kvm.h
M linux-user/main.c
M plugins/core.c
M system/cpus.c
M system/vl.c
M target/alpha/cpu-qom.h
M target/alpha/cpu.c
M target/alpha/cpu.h
M target/arm/cpu-qom.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/internals.h
M target/avr/cpu-qom.h
M target/avr/cpu.c
M target/avr/cpu.h
M target/cris/cpu-qom.h
M target/cris/cpu.c
M target/cris/cpu.h
A target/hexagon/cpu-qom.h
M target/hexagon/cpu.c
M target/hexagon/cpu.h
M target/hppa/cpu-qom.h
M target/hppa/cpu.h
M target/i386/cpu-qom.h
M target/i386/cpu.c
M target/i386/cpu.h
M target/i386/hvf/hvf.c
M target/i386/hvf/x86_emu.c
M target/i386/hvf/x86_emu.h
M target/i386/kvm/kvm-cpu.c
M target/i386/monitor.c
A target/loongarch/cpu-qom.h
M target/loongarch/cpu.c
M target/loongarch/cpu.h
M target/m68k/cpu-qom.h
M target/m68k/cpu.c
M target/m68k/cpu.h
M target/microblaze/cpu-qom.h
M target/microblaze/cpu.h
M target/mips/cpu-qom.h
M target/mips/cpu.h
M target/mips/tcg/msa.decode
M target/mips/tcg/tx79.decode
A target/nios2/cpu-qom.h
M target/nios2/cpu.c
M target/nios2/cpu.h
A target/openrisc/cpu-qom.h
M target/openrisc/cpu.c
M target/openrisc/cpu.h
M target/ppc/cpu-qom.h
M target/ppc/cpu.h
M target/ppc/excp_helper.c
R target/ppc/kvm-stub.c
M target/ppc/kvm.c
M target/ppc/kvm_ppc.h
M target/ppc/meson.build
M target/riscv/cpu-qom.h
M target/riscv/cpu.c
M target/riscv/cpu.h
M target/riscv/internals.h
M target/rx/cpu-qom.h
M target/rx/cpu.c
M target/rx/cpu.h
M target/s390x/cpu-qom.h
M target/s390x/cpu.h
M target/s390x/cpu_models.c
M target/s390x/diag.c
M target/sh4/cpu-qom.h
M target/sh4/cpu.c
M target/sh4/cpu.h
M target/sparc/cpu-qom.h
M target/sparc/cpu.h
M target/tricore/cpu-qom.h
M target/tricore/cpu.c
M target/tricore/cpu.h
M target/xtensa/cpu-qom.h
M target/xtensa/cpu.c
M target/xtensa/cpu.h
M target/xtensa/op_helper.c
A tests/qtest/adm1266-test.c
M tests/qtest/ahci-test.c
M tests/qtest/max34451-test.c
M tests/qtest/meson.build
M tests/unit/meson.build
M tests/unit/test-seccomp.c
R tests/unit/test-x86-cpuid.c
A tests/unit/test-x86-topo.c
M tests/vm/ubuntu.aarch64
M ui/sdl2.c
Log Message:
-----------
Merge tag 'misc-cpus-20231106' of https://github.com/philmd/qemu into staging
Misc hardware patch queue
HW emulation:
- PMBus fixes and tests (Titus)
- IDE fixes and tests (Fiona)
- New ADM1266 sensor (Titus)
- Better error propagation in PCI-ISA i82378 (Philippe)
Topology:
- Fix CPUState::nr_cores calculation (Zhuocheng Ding and Zhao Liu)
Monitor:
- Synchronize CPU state in 'info lapic' (Dongli Zhang)
QOM:
- Have 'cpu-qom.h' target-agnostic (Philippe)
- Call object_class_is_abstract once in cpu_class_by_name (Philippe)
UI:
- Use correct key names in titles on MacOS / SDL2 (Adrian)
MIPS:
- Fix MSA BZ/BNZ and TX79 LQ/SQ opcodes (Philippe)
Nios2:
- Create IRQs *after* vCPU is realized (Philippe)
PPC:
- Restrict KVM objects to system emulation (Philippe)
X86:
- HVF & KVM cleanups (Philippe)
Various targets:
- Use env_archcpu() to optimize (Philippe)
Misc:
- Few global variable shadowing removed (Philippe)
- Introduce cpu_exec_reset_hold and factor tcg_cpu_reset_hold out (Philippe)
- Remove few more 'softmmu' mentions (Philippe)
- Fix and cleanup in vl.c (Akihiko & Marc-André)
- MAINTAINERS updates (Thomas, Daniel)
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# gpg: Signature made Mon 06 Nov 2023 19:12:05 HKT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>"
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'misc-cpus-20231106' of https://github.com/philmd/qemu: (60 commits)
ui/sdl2: use correct key names in win title on mac
MAINTAINERS: update libvirt devel mailing list address
MAINTAINERS: Add the CAN documentation file to the CAN section
MAINTAINERS: Add include/hw/timer/tmu012.h to the SH4 R2D section
hw/i2c: pmbus: reset page register for out of range reads
hw/i2c: pmbus: immediately clear faults on request
tests/qtest: add tests for ADM1266
hw/sensor: add ADM1266 device model
hw/i2c: pmbus: add VCAP register
hw/i2c: pmbus: add fan support
hw/i2c: pmbus: add vout mode bitfields
hw/i2c: pmbus add support for block receive
tests/qtest: ahci-test: add test exposing reset issue with pending callback
hw/ide: reset: cancel async DMA operation before resetting state
hw/cpu: Update the comments of nr_cores and nr_dies
system/cpus: Fix CPUState.nr_cores' calculation
tests/unit: Rename test-x86-cpuid.c to test-x86-topo.c
hw/i386: Fix comment style in topology.h
hw/isa/i82378: Propagate error if PC_SPEAKER device creation failed
hw/loader: Clean up global variable shadowing in rom_add_file()
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 2ca06f8a2ae8c038deb75ec5d2db22faf11b8adc
https://github.com/qemu/qemu/commit/2ca06f8a2ae8c038deb75ec5d2db22faf11b8adc
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M hw/display/ati.c
M hw/display/ati_2d.c
M hw/display/ati_dbg.c
M hw/display/ati_int.h
M hw/display/ati_regs.h
M hw/display/virtio-gpu-pci-rutabaga.c
M hw/display/virtio-gpu.c
Log Message:
-----------
Merge tag 'gpu-pull-request' of https://gitlab.com/marcandre.lureau/qemu into
staging
GPU pull request
Includes:
- [PATCH] virtio-gpu-rutabaga: Add empty interface to fix arm64 crash
- [PATCH v2 0/4] Misc ati-vga patches
- [PATCH v2 0/5] virtio-gpu: add blob migration support
# -----BEGIN PGP SIGNATURE-----
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# =k/gN
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 06 Nov 2023 21:31:34 HKT
# gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg: issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>"
[full]
# gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>"
[full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5
* tag 'gpu-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
Revert "virtio-gpu: block migration of VMs with blob=true"
virtio-gpu: add virtio-gpu/blob vmstate subsection
virtio-gpu: move scanout restoration to post_load
virtio-gpu: factor out restore mapping
virtio-gpu: block migration of VMs with blob=true
ati-vga: Implement fallback for pixman routines
ati-vga: Add 30 bit palette access register
ati-vga: Support unaligned access to GPIO DDC registers
ati-vga: Fix aperture sizes
virtio-gpu-rutabaga: Add empty interface to fix arm64 crash
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: aa93da11e04911112891fd6aa9b4f7f1ee7cb7d1
https://github.com/qemu/qemu/commit/aa93da11e04911112891fd6aa9b4f7f1ee7cb7d1
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M Kconfig.host
M MAINTAINERS
M hw/core/machine-hmp-cmds.c
M hw/hyperv/Kconfig
A hw/hyperv/hv-balloon-internal.h
A hw/hyperv/hv-balloon-our_range_memslots.c
A hw/hyperv/hv-balloon-our_range_memslots.h
A hw/hyperv/hv-balloon-page_range_tree.c
A hw/hyperv/hv-balloon-page_range_tree.h
A hw/hyperv/hv-balloon-stub.c
A hw/hyperv/hv-balloon.c
M hw/hyperv/meson.build
M hw/hyperv/trace-events
M hw/i386/Kconfig
M hw/i386/pc.c
M hw/mem/memory-device.c
M hw/virtio/virtio-pmem.c
A include/hw/hyperv/dynmem-proto.h
A include/hw/hyperv/hv-balloon.h
M include/hw/mem/memory-device.h
M meson.build
M meson_options.txt
M monitor/monitor.c
M qapi/machine.json
M scripts/meson-buildoptions.sh
M tests/qtest/qmp-cmd-test.c
Log Message:
-----------
Merge tag 'pull-hv-balloon-20231106' of
https://github.com/maciejsszmigiero/qemu into staging
Hyper-V Dynamic Memory protocol driver.
This driver is like virtio-balloon on steroids for Windows guests:
it allows both changing the guest memory allocation via ballooning and
inserting pieces of extra RAM into it on demand from a provided memory
backend via Windows-native Hyper-V Dynamic Memory protocol.
* Preparatory patches to support empty memory devices and ones with
large alignment requirements.
* Revert of recently added "hw/virtio/virtio-pmem: Replace impossible
check by assertion" commit 5960f254dbb4 since this series makes this
situation possible again.
* Protocol definitions.
* Hyper-V DM protocol driver (hv-balloon) base (ballooning only).
* Hyper-V DM protocol driver (hv-balloon) hot-add support.
* qapi query-memory-devices support for the driver.
* qapi HV_BALLOON_STATUS_REPORT event.
* The relevant PC machine plumbing.
* New MAINTAINERS entry for the above.
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# =RAb0
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 06 Nov 2023 22:08:18 HKT
# gpg: using RSA key E2776AABA08E26FF5A1B4A0952B1D6E951D0CE07
# gpg: Good signature from "Maciej S. Szmigiero <mail@maciej.szmigiero.name>"
[unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 727A 0D4D DB9E D9F6 039B ECEF 847F 5E37 90CE 0977
# Subkey fingerprint: E277 6AAB A08E 26FF 5A1B 4A09 52B1 D6E9 51D0 CE07
* tag 'pull-hv-balloon-20231106' of https://github.com/maciejsszmigiero/qemu:
MAINTAINERS: Add an entry for Hyper-V Dynamic Memory Protocol
hw/i386/pc: Support hv-balloon
qapi: Add HV_BALLOON_STATUS_REPORT event and its QMP query command
qapi: Add query-memory-devices support to hv-balloon
Add Hyper-V Dynamic Memory Protocol driver (hv-balloon) hot-add support
Add Hyper-V Dynamic Memory Protocol driver (hv-balloon) base
Add Hyper-V Dynamic Memory Protocol definitions
memory-device: Drop size alignment check
Revert "hw/virtio/virtio-pmem: Replace impossible check by assertion"
memory-device: Support empty memory devices
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: c1802fda9efaff33c0a1a0202217815126d8011d
https://github.com/qemu/qemu/commit/c1802fda9efaff33c0a1a0202217815126d8011d
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M block/parallels-ext.c
M block/vdi.c
M docs/devel/index-api.rst
A docs/devel/pci.rst
M hw/alpha/typhoon.c
M hw/arm/smmu-common.c
M hw/core/qdev-properties-system.c
M hw/hyperv/vmbus.c
M hw/i386/amd_iommu.c
M hw/i386/intel_iommu.c
M hw/pci-host/astro.c
M hw/pci-host/designware.c
M hw/pci-host/dino.c
M hw/pci-host/pnv_phb3.c
M hw/pci-host/pnv_phb4.c
M hw/pci-host/ppce500.c
M hw/pci-host/raven.c
M hw/pci-host/sabre.c
M hw/pci/pci.c
M hw/ppc/ppc440_pcix.c
M hw/ppc/spapr_pci.c
M hw/ppc/spapr_pci_vfio.c
M hw/remote/iommu.c
M hw/s390x/s390-pci-bus.c
M hw/vfio/ap.c
M hw/vfio/ccw.c
M hw/vfio/common.c
M hw/vfio/container.c
M hw/vfio/helpers.c
M hw/vfio/pci.c
M hw/vfio/spapr.c
M hw/virtio/trace-events
M hw/virtio/virtio-iommu-pci.c
M hw/virtio/virtio-iommu.c
M include/exec/memory.h
M include/hw/pci/pci.h
M include/hw/pci/pci_bus.h
M include/hw/vfio/vfio-common.h
R include/hw/vfio/vfio.h
M include/hw/virtio/virtio-iommu.h
M include/qemu/range.h
A include/qemu/reserved-region.h
M include/qemu/uuid.h
M migration/savevm.c
M system/memory.c
M tests/unit/meson.build
A tests/unit/test-resv-mem.c
M tests/unit/test-uuid.c
M util/meson.build
M util/range.c
A util/reserved-region.c
M util/uuid.c
Log Message:
-----------
Merge tag 'pull-vfio-20231106' of https://github.com/legoater/qemu into
staging
vfio queue:
* Support for non 64b IOVA space
* Introduction of a PCIIOMMUOps callback structure to ease future
extensions
* Fix for a buffer overrun when writing the VF token
* PPC cleanups preparing ground for IOMMUFD support
* tag 'pull-vfio-20231106' of https://github.com/legoater/qemu: (22 commits)
vfio/common: Move vfio_host_win_add/del into spapr.c
vfio/spapr: Make vfio_spapr_create/remove_window static
vfio/container: Move spapr specific init/deinit into spapr.c
vfio/container: Move vfio_container_add/del_section_window into spapr.c
vfio/container: Move IBM EEH related functions into spapr_pci_vfio.c
util/uuid: Define UUID_STR_LEN from UUID_NONE string
util/uuid: Remove UUID_FMT_LEN
vfio/pci: Fix buffer overrun when writing the VF token
util/uuid: Add UUID_STR_LEN definition
hw/pci: modify pci_setup_iommu() to set PCIIOMMUOps
test: Add some tests for range and resv-mem helpers
virtio-iommu: Consolidate host reserved regions and property set ones
virtio-iommu: Implement set_iova_ranges() callback
virtio-iommu: Record whether a probe request has been issued
range: Introduce range_inverse_array()
virtio-iommu: Introduce per IOMMUDevice reserved regions
util/reserved-region: Add new ReservedRegion helpers
range: Make range_compare() public
virtio-iommu: Rename reserved_regions into prop_resv_regions
vfio: Collect container iova range info
...
Conflicts:
tests/unit/meson.build
Context conflict because test-x86-cpuid was renamed to test-x86-topo
in commit 2fb8646a8d33 ("tests/unit: Rename test-x86-cpuid.c to
test-x86-topo.c").
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 30817a1b909c22b69251231d00a5902e4ecbd6dc
https://github.com/qemu/qemu/commit/30817a1b909c22b69251231d00a5902e4ecbd6dc
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M block/nvme.c
M docs/system/arm/vexpress.rst
M hw/arm/vexpress.c
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M hw/core/loader.c
M hw/i386/intel_iommu.c
M hw/rtc/mc146818rtc.c
M io/channel-socket.c
M target/arm/tcg/a64.decode
M target/arm/tcg/translate.h
M tests/data/acpi/virt/DBG2
M tests/data/acpi/virt/SPCR
M util/filemonitor-inotify.c
Log Message:
-----------
Merge tag 'pull-target-arm-20231106' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/arm/virt: fix PMU IRQ registration
* hw/arm/virt: Report correct register sizes in ACPI DBG2/SPCR tables
* hw/i386/intel_iommu: vtd_slpte_nonzero_rsvd(): assert no overflow
* util/filemonitor-inotify: qemu_file_monitor_watch(): assert no overflow
* mc146818rtc: rtc_set_time(): initialize tm to zeroes
* block/nvme: nvme_process_completion() fix bound for cid
* hw/core/loader: gunzip(): initialize z_stream
* io/channel-socket: qio_channel_socket_flush(): improve msg validation
* hw/arm/vexpress-a9: Remove useless mapping of RAM at address 0
* target/arm: Fix A64 LDRA immediate decode
# -----BEGIN PGP SIGNATURE-----
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# =UbqJ
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 06 Nov 2023 23:31:33 HKT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20231106' of
https://git.linaro.org/people/pmaydell/qemu-arm:
target/arm: Fix A64 LDRA immediate decode
hw/arm/vexpress-a9: Remove useless mapping of RAM at address 0
io/channel-socket: qio_channel_socket_flush(): improve msg validation
hw/core/loader: gunzip(): initialize z_stream
block/nvme: nvme_process_completion() fix bound for cid
mc146818rtc: rtc_set_time(): initialize tm to zeroes
util/filemonitor-inotify: qemu_file_monitor_watch(): assert no overflow
hw/i386/intel_iommu: vtd_slpte_nonzero_rsvd(): assert no overflow
tests/qtest/bios-tables-test: Update virt SPCR and DBG2 golden references
hw/arm/virt: Report correct register sizes in ACPI DBG2/SPCR tables.
tests/qtest/bios-tables-test: Allow changes to virt SPCR and DBG2
hw/arm/virt: fix PMU IRQ registration
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: ba5c6ec5666da098dd73979480d897a227a76b68
https://github.com/qemu/qemu/commit/ba5c6ec5666da098dd73979480d897a227a76b68
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-11-07 (Tue, 07 Nov 2023)
Changed paths:
M block/file-posix.c
M block/qcow2-cluster.c
M qapi/block-core.json
M qemu-options.hx
Log Message:
-----------
Merge tag 'pull-block-2023-11-06' of https://gitlab.com/hreitz/qemu into
staging
Block patches:
- One patch to make qcow2's discard-no-unref option do better what it is
supposed to do (i.e. prevent fragmentation)
- Two fixes for zoned requests
# -----BEGIN PGP SIGNATURE-----
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# 2QtPWS0qRmwd
# =5w7S
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 07 Nov 2023 01:09:12 HKT
# gpg: using RSA key CB62D7A0EE3829E45F004D34A1FA40D098019CDF
# gpg: issuer "hreitz@redhat.com"
# gpg: Good signature from "Hanna Reitz <hreitz@redhat.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: CB62 D7A0 EE38 29E4 5F00 4D34 A1FA 40D0 9801 9CDF
* tag 'pull-block-2023-11-06' of https://gitlab.com/hreitz/qemu:
file-posix: fix over-writing of returning zone_append offset
block/file-posix: fix update_zones_wp() caller
qcow2: keep reference on zeroize with discard-no-unref enabled
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Compare: https://github.com/qemu/qemu/compare/3e01f1147a16...ba5c6ec5666d
- [Qemu-commits] [qemu/qemu] e8f433: memory: Let ReservedRegion use Range,
Alex Bennée <=