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[Qemu-commits] [qemu/qemu] d48097: tcg: Introduce TCG_COND_TST{EQ, NE}
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] d48097: tcg: Introduce TCG_COND_TST{EQ, NE} |
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Date: |
Thu, 08 Feb 2024 08:14:29 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: d48097d0270e702e4de88f6e36a256ebff33ad6c
https://github.com/qemu/qemu/commit/d48097d0270e702e4de88f6e36a256ebff33ad6c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M docs/devel/tcg-ops.rst
M include/tcg/tcg-cond.h
M tcg/tcg.c
Log Message:
-----------
tcg: Introduce TCG_COND_TST{EQ,NE}
Add the enumerators, adjust the helpers to match, and dump.
Not supported anywhere else just yet.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: caf3eacc8f7f372c589432f53fb5835680a8863b
https://github.com/qemu/qemu/commit/caf3eacc8f7f372c589432f53fb5835680a8863b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Introduce TCG_TARGET_HAS_tst
Define as 0 for all tcg backends.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 27cdb85d0696a582d5710bb493a5eb904efba7a0
https://github.com/qemu/qemu/commit/27cdb85d0696a582d5710bb493a5eb904efba7a0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg/optimize: Split out arg_is_const_val
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 246c4b72fa88419a45ff3d4b8e8fef405337bc1a
https://github.com/qemu/qemu/commit/246c4b72fa88419a45ff3d4b8e8fef405337bc1a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg/optimize: Split out do_constant_folding_cond1
Handle modifications to the arguments and condition
in a single place.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7e64b114d19d734dc0ecbf100e6adf18f0fb10e2
https://github.com/qemu/qemu/commit/7e64b114d19d734dc0ecbf100e6adf18f0fb10e2
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg/optimize: Do swap_commutative2 in do_constant_folding_cond2
Mirror the new do_constant_folding_cond1 by doing all
argument and condition adjustment within one helper.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ceb9ee06b719b3185183c72f818e75600c8e2607
https://github.com/qemu/qemu/commit/ceb9ee06b719b3185183c72f818e75600c8e2607
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg/optimize: Handle TCG_COND_TST{EQ,NE}
Fold constant comparisons.
Canonicalize "tst x,x" to equality vs zero.
Canonicalize "tst x,sign" to sign test vs zero.
Fold double-word comparisons with zero parts.
Fold setcond of "tst x,pow2" to a bit extract.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fb04ab7ddd8ca226227d78dbe27c8696f4a27d7f
https://github.com/qemu/qemu/commit/fb04ab7ddd8ca226227d78dbe27c8696f4a27d7f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/optimize.c
M tcg/tcg-internal.h
M tcg/tcg.c
Log Message:
-----------
tcg/optimize: Lower TCG_COND_TST{EQ,NE} if unsupported
After having performed other simplifications, lower any
remaining test comparisons with AND.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 42c47f631fbeda2b88ededa53136d8ea081c306b
https://github.com/qemu/qemu/commit/42c47f631fbeda2b88ededa53136d8ea081c306b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/alpha/translate.c
Log Message:
-----------
target/alpha: Pass immediate value to gen_bcond_internal()
Simplify gen_bcond() by passing an immediate value.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231028194522.245170-33-richard.henderson@linaro.org>
[PMD: Split from bigger patch, part 1/2]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231108205247.83234-1-philmd@linaro.org>
Commit: c66ba9786ad16961e3c9ee668f21c284945387bf
https://github.com/qemu/qemu/commit/c66ba9786ad16961e3c9ee668f21c284945387bf
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/alpha/translate.c
Log Message:
-----------
target/alpha: Use TCG_COND_TST{EQ,NE} for BLB{C,S}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231028194522.245170-33-richard.henderson@linaro.org>
[PMD: Split from bigger patch, part 2/2]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231108205247.83234-2-philmd@linaro.org>
Commit: c47341f1d4fb818428900bbdb6630edfbe3782bf
https://github.com/qemu/qemu/commit/c47341f1d4fb818428900bbdb6630edfbe3782bf
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/alpha/translate.c
Log Message:
-----------
target/alpha: Use TCG_COND_TST{EQ,NE} for CMOVLB{C,S}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 630ee069c61705cbcd8aa1963775e335230c8182
https://github.com/qemu/qemu/commit/630ee069c61705cbcd8aa1963775e335230c8182
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/alpha/translate.c
Log Message:
-----------
target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2358cf77d1a8a752aff5917892c4699b0ba0601e
https://github.com/qemu/qemu/commit/2358cf77d1a8a752aff5917892c4699b0ba0601e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 50280618d9ae434564a2e321cfb5b248309bed70
https://github.com/qemu/qemu/commit/50280618d9ae434564a2e321cfb5b248309bed70
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7da3601e624e31a1bd7f94d1557a6e61af883ec8
https://github.com/qemu/qemu/commit/7da3601e624e31a1bd7f94d1557a6e61af883ec8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/s390x/tcg/translate.c
Log Message:
-----------
target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM}
These are all test-and-compare type instructions.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f9ec459da8b15e857e0ffd94ccb6276284592cce
https://github.com/qemu/qemu/commit/f9ec459da8b15e857e0ffd94ccb6276284592cce
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M target/s390x/tcg/translate.c
Log Message:
-----------
target/s390x: Improve general case of disas_jcc
Avoid code duplication by handling 7 of the 14 cases
by inverting the test for the other 7 cases.
Use TCG_COND_TSTNE for cc in {1,3}.
Use (cc - 1) <= 1 for cc in {1,2}.
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 21e9a8aefb0313174c1861df84e5e49bd84026c8
https://github.com/qemu/qemu/commit/21e9a8aefb0313174c1861df84e5e49bd84026c8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Add TCGConst argument to tcg_target_const_match
Fill the new argument from any condition within the opcode.
Not yet used within any backend.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 339adf2f38e573bb3418bcdbcca6ea564c4a724c
https://github.com/qemu/qemu/commit/339adf2f38e573bb3418bcdbcca6ea564c4a724c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/aarch64/tcg-target-con-set.h
M tcg/aarch64/tcg-target-con-str.h
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
Log Message:
-----------
tcg/aarch64: Support TCG_COND_TST{EQ,NE}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a0f5b3fc27e095b218843233294c11c5d3ce9b6e
https://github.com/qemu/qemu/commit/a0f5b3fc27e095b218843233294c11c5d3ce9b6e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Massage tcg_out_brcond()
In order to ease next commit review, modify tcg_out_brcond()
to switch over TCGCond. No logical change intended.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240119224737.48943-1-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 92a11b935df24829cac30510196c6d07b36891ea
https://github.com/qemu/qemu/commit/92a11b935df24829cac30510196c6d07b36891ea
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Generate TBZ, TBNZ
Test the sign bit for LT/GE vs 0, and TSTNE/EQ vs a power of 2.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240119224737.48943-2-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 34aff3c2e065dc19fbd83eb7b4766776f73378ab
https://github.com/qemu/qemu/commit/34aff3c2e065dc19fbd83eb7b4766776f73378ab
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX
... and the inverse, CBZ for TSTEQ.
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e67ec08c3de4354e2616f677a4ce97602ac039ad
https://github.com/qemu/qemu/commit/e67ec08c3de4354e2616f677a4ce97602ac039ad
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/arm/tcg-target.c.inc
Log Message:
-----------
tcg/arm: Split out tcg_out_cmp()
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231028194522.245170-12-richard.henderson@linaro.org>
[PMD: Split from bigger patch, part 1/2]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231108145244.72421-1-philmd@linaro.org>
Commit: 9f5666141042661d9b738355312cf087d07d2b42
https://github.com/qemu/qemu/commit/9f5666141042661d9b738355312cf087d07d2b42
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
Log Message:
-----------
tcg/arm: Support TCG_COND_TST{EQ,NE}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231028194522.245170-12-richard.henderson@linaro.org>
[PMD: Split from bigger patch, part 2/2]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231108145244.72421-2-philmd@linaro.org>
Commit: c95da56bfe103d41742fd5487e71f3563731c6fe
https://github.com/qemu/qemu/commit/c95da56bfe103d41742fd5487e71f3563731c6fe
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Pass x86 condition codes to tcg_out_cmov
Hoist the tcg_cond_to_jcc index outside the function.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6749d85bd79f52aa0070cab9c5ed7c8749ab71e9
https://github.com/qemu/qemu/commit/6749d85bd79f52aa0070cab9c5ed7c8749ab71e9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp
Return the x86 condition codes to use after the compare.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 303214aac96da86b5b11dd8aa16e646a63d3bbab
https://github.com/qemu/qemu/commit/303214aac96da86b5b11dd8aa16e646a63d3bbab
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
Log Message:
-----------
tcg/i386: Support TCG_COND_TST{EQ,NE}
Merge tcg_out_testi into tcg_out_cmp and adjust the two uses.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d3d1c30c63bba87e178b89e6610cec5a1d2afb7a
https://github.com/qemu/qemu/commit/d3d1c30c63bba87e178b89e6610cec5a1d2afb7a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/i386/tcg-target-con-set.h
M tcg/i386/tcg-target-con-str.h
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Improve TSTNE/TESTEQ vs powers of two
Use "test x,x" when the bit is one of the 4 sign bits.
Use "bt imm,x" otherwise.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: be1335dba153c70fa380b70bfbcaf59b51df4ed3
https://github.com/qemu/qemu/commit/be1335dba153c70fa380b70bfbcaf59b51df4ed3
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Use TEST r,r to test 8/16/32 bits
Just like when testing against the sign bits, TEST r,r can be used when the
immediate is 0xff, 0xff00, 0xffff, 0xffffffff.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6bc74a538722bf2bdc79b55a4db8862ffe119735
https://github.com/qemu/qemu/commit/6bc74a538722bf2bdc79b55a4db8862ffe119735
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/sparc64/tcg-target.c.inc
Log Message:
-----------
tcg/sparc64: Hoist read of tcg_cond_to_rcond
Use a non-zero value here (an illegal encoding) as a better
condition than is_unsigned_cond for when MOVR/BPR is usable.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 905afe37ab44ff4f55463edba3bb5c6026b815a9
https://github.com/qemu/qemu/commit/905afe37ab44ff4f55463edba3bb5c6026b815a9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/sparc64/tcg-target.c.inc
Log Message:
-----------
tcg/sparc64: Pass TCGCond to tcg_out_cmp
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b9ddaf5618adbb9d392ecd6b29b2cb76596de134
https://github.com/qemu/qemu/commit/b9ddaf5618adbb9d392ecd6b29b2cb76596de134
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
Log Message:
-----------
tcg/sparc64: Support TCG_COND_TST{EQ,NE}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2e7eafcc402b61ff2ffebfb90777efc37f4d4a1f
https://github.com/qemu/qemu/commit/2e7eafcc402b61ff2ffebfb90777efc37f4d4a1f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc
Rename the current tcg_out_bc function to tcg_out_bc_lab, and
create a new function that takes an integer displacement + link.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 740f1d40e593e7be18f4eb355ba6b40b5c788923
https://github.com/qemu/qemu/commit/740f1d40e593e7be18f4eb355ba6b40b5c788923
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel
Using cr0 means we could choose to use rc=1 to compute the condition.
Adjust the tables and tcg_out_cmp that feeds them.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2f2faef6b08aa6f3c3439f3ac307a1ded923b0a5
https://github.com/qemu/qemu/commit/2f2faef6b08aa6f3c3439f3ac307a1ded923b0a5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Tidy up tcg_target_const_match
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 282ef7e8ef210c5582435f2d4cd9befc3130f5c6
https://github.com/qemu/qemu/commit/282ef7e8ef210c5582435f2d4cd9befc3130f5c6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/ppc/tcg-target-con-set.h
M tcg/ppc/tcg-target-con-str.h
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Add TCG_CT_CONST_CMP
Better constraint for tcg_out_cmp, based on the comparison.
We can't yet remove the fallback to load constants into a
scratch because of tcg_out_cmp2, but that path should not
be as frequent.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ad788aebbabb84e0c35dcd96fce520cb8f5c1fb0
https://github.com/qemu/qemu/commit/ad788aebbabb84e0c35dcd96fce520cb8f5c1fb0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
Log Message:
-----------
tcg/ppc: Support TCG_COND_TST{EQ,NE}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cbaddf30949a95f9133a6b3661ab5816db19833e
https://github.com/qemu/qemu/commit/cbaddf30949a95f9133a6b3661ab5816db19833e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/s390x/tcg-target-con-set.h
M tcg/s390x/tcg-target-con-str.h
M tcg/s390x/tcg-target.c.inc
Log Message:
-----------
tcg/s390x: Split constraint A into J+U
Signed 33-bit == signed 32-bit + unsigned 32-bit.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d95b51d3fb917d0b07cc18e567cb0512ef97292e
https://github.com/qemu/qemu/commit/d95b51d3fb917d0b07cc18e567cb0512ef97292e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-03 (Sat, 03 Feb 2024)
Changed paths:
M tcg/s390x/tcg-target-con-set.h
M tcg/s390x/tcg-target-con-str.h
M tcg/s390x/tcg-target.c.inc
Log Message:
-----------
tcg/s390x: Add TCG_CT_CONST_CMP
Better constraint for tcg_out_cmp, based on the comparison.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 585b7a424759ee4b70b1e93feecac2530f26d25a
https://github.com/qemu/qemu/commit/585b7a424759ee4b70b1e93feecac2530f26d25a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
Log Message:
-----------
tcg/s390x: Support TCG_COND_TST{EQ,NE}
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 23c5692abc3917151dee36c00d751cf5bc46ef19
https://github.com/qemu/qemu/commit/23c5692abc3917151dee36c00d751cf5bc46ef19
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-02-05 (Mon, 05 Feb 2024)
Changed paths:
M tcg/tci.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg/tci: Support TCG_COND_TST{EQ,NE}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 03e4bc0bc02779fdf6f8e8d83197f05e70881abf
https://github.com/qemu/qemu/commit/03e4bc0bc02779fdf6f8e8d83197f05e70881abf
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-02-08 (Thu, 08 Feb 2024)
Changed paths:
M docs/devel/tcg-ops.rst
M include/tcg/tcg-cond.h
M target/alpha/translate.c
M target/m68k/translate.c
M target/s390x/tcg/translate.c
M target/sparc/translate.c
M tcg/aarch64/tcg-target-con-set.h
M tcg/aarch64/tcg-target-con-str.h
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target-con-set.h
M tcg/i386/tcg-target-con-str.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target-con-set.h
M tcg/ppc/tcg-target-con-str.h
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target-con-set.h
M tcg/s390x/tcg-target-con-str.h
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
M tcg/tcg-internal.h
M tcg/tcg.c
M tcg/tci.c
M tcg/tci/tcg-target.c.inc
M tcg/tci/tcg-target.h
Log Message:
-----------
Merge tag 'pull-tcg-20240205-2' of https://gitlab.com/rth7680/qemu into
staging
tcg: Introduce TCG_COND_TST{EQ,NE}
target/alpha: Use TCG_COND_TST{EQ,NE}
target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond
target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc
target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM}
target/s390x: Improve general case of disas_jcc
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# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
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* tag 'pull-tcg-20240205-2' of https://gitlab.com/rth7680/qemu: (39 commits)
tcg/tci: Support TCG_COND_TST{EQ,NE}
tcg/s390x: Support TCG_COND_TST{EQ,NE}
tcg/s390x: Add TCG_CT_CONST_CMP
tcg/s390x: Split constraint A into J+U
tcg/ppc: Support TCG_COND_TST{EQ,NE}
tcg/ppc: Add TCG_CT_CONST_CMP
tcg/ppc: Tidy up tcg_target_const_match
tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel
tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc
tcg/sparc64: Support TCG_COND_TST{EQ,NE}
tcg/sparc64: Pass TCGCond to tcg_out_cmp
tcg/sparc64: Hoist read of tcg_cond_to_rcond
tcg/i386: Use TEST r,r to test 8/16/32 bits
tcg/i386: Improve TSTNE/TESTEQ vs powers of two
tcg/i386: Support TCG_COND_TST{EQ,NE}
tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp
tcg/i386: Pass x86 condition codes to tcg_out_cmov
tcg/arm: Support TCG_COND_TST{EQ,NE}
tcg/arm: Split out tcg_out_cmp()
tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/9e34f127f419...03e4bc0bc027