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[Qemu-devel] [PULL 03/49] target/arm: Allow Aarch32 exception return to
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 03/49] target/arm: Allow Aarch32 exception return to switch from Mon->Hyp |
Date: |
Fri, 18 Jan 2019 14:57:19 +0000 |
From: Alexander Graf <address@hidden>
In U-boot, we switch from S-SVC -> Mon -> Hyp mode when we want to
enter Hyp mode. The change into Hyp mode is done by doing an
exception return from Mon. This doesn't work with current QEMU.
The problem is that in bad_mode_switch() we refuse to allow
the change of mode.
Note that bad_mode_switch() is used to do validation for two situations:
(1) changes to mode by instructions writing to CPSR.M
(ie not exception take/return) -- this corresponds to the
Armv8 Arm ARM pseudocode Arch32.WriteModeByInstr
(2) changes to mode by exception return
Attempting to enter or leave Hyp mode via case (1) is forbidden in
v8 and UNPREDICTABLE in v7, and QEMU is correct to disallow it
there. However, we're already doing that check at the top of the
bad_mode_switch() function, so if that passes then we should allow
the case (2) exception return mode changes to switch into Hyp mode.
We want to test whether we're trying to return to the nonexistent
"secure Hyp" mode, so we need to look at arm_is_secure_below_el3()
rather than arm_is_secure(), since the latter is always true if
we're in Mon (EL3).
Signed-off-by: Alexander Graf <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
[PMM: rewrote commit message]
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index f00c141ef96..9bf8fbd8f9b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6297,7 +6297,7 @@ static int bad_mode_switch(CPUARMState *env, int mode,
CPSRWriteType write_type)
return 0;
case ARM_CPU_MODE_HYP:
return !arm_feature(env, ARM_FEATURE_EL2)
- || arm_current_el(env) < 2 || arm_is_secure(env);
+ || arm_current_el(env) < 2 || arm_is_secure_below_el3(env);
case ARM_CPU_MODE_MON:
return arm_current_el(env) < 3;
default:
--
2.20.1
- [Qemu-devel] [PULL 00/49] target-arm queue, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 01/49] hw/char/stm32f2xx_usart: Do not update data register when device is disabled, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 02/49] hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 04/49] ftgmac100: implement the new MDIO interface on Aspeed SoC, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 03/49] target/arm: Allow Aarch32 exception return to switch from Mon->Hyp,
Peter Maydell <=
- [Qemu-devel] [PULL 05/49] target/arm: Add state for the ARMv8.3-PAuth extension, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 06/49] target/arm: Add SCTLR bits through ARMv8.5, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 07/49] target/arm: Add PAuth active bit to tbflags, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 08/49] target/arm: Introduce raise_exception_ra, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 21/49] target/arm: Introduce arm_stage1_mmu_idx, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 18/49] target/arm: Decode Load/store register (pac), Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 15/49] target/arm: Add new_pc argument to helper_exception_return, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 11/49] target/arm: Rearrange decode in disas_data_proc_1src, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 17/49] target/arm: Decode PAuth within disas_uncond_b_reg, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 20/49] target/arm: Introduce arm_mmu_idx, Peter Maydell, 2019/01/18