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[Qemu-devel] [PULL 26/49] target/arm: Decode TBID from TCR
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 26/49] target/arm: Decode TBID from TCR |
Date: |
Fri, 18 Jan 2019 14:57:42 +0000 |
From: Richard Henderson <address@hidden>
Use TBID in aa64_va_parameters depending on the data parameter.
This automatically updates all existing users of the function.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/internals.h | 1 +
target/arm/helper.c | 14 +++++++++++---
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index acd99b579cd..a6fd4582b2b 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -950,6 +950,7 @@ typedef struct ARMVAParameters {
unsigned tsz : 8;
unsigned select : 1;
bool tbi : 1;
+ bool tbid : 1;
bool epd : 1;
bool hpd : 1;
bool using16k : 1;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 75a6004decd..d9b580e3316 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9749,7 +9749,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
{
uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr;
uint32_t el = regime_el(env, mmu_idx);
- bool tbi, epd, hpd, using16k, using64k;
+ bool tbi, tbid, epd, hpd, using16k, using64k;
int select, tsz;
/*
@@ -9764,10 +9764,11 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState
*env, uint64_t va,
using16k = extract32(tcr, 15, 1);
if (mmu_idx == ARMMMUIdx_S2NS) {
/* VTCR_EL2 */
- tbi = hpd = false;
+ tbi = tbid = hpd = false;
} else {
tbi = extract32(tcr, 20, 1);
hpd = extract32(tcr, 24, 1);
+ tbid = extract32(tcr, 29, 1);
}
epd = false;
} else if (!select) {
@@ -9777,6 +9778,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
using16k = extract32(tcr, 15, 1);
tbi = extract64(tcr, 37, 1);
hpd = extract64(tcr, 41, 1);
+ tbid = extract64(tcr, 51, 1);
} else {
int tg = extract32(tcr, 30, 2);
using16k = tg == 1;
@@ -9785,6 +9787,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
epd = extract32(tcr, 23, 1);
tbi = extract64(tcr, 38, 1);
hpd = extract64(tcr, 42, 1);
+ tbid = extract64(tcr, 52, 1);
}
tsz = MIN(tsz, 39); /* TODO: ARMv8.4-TTST */
tsz = MAX(tsz, 16); /* TODO: ARMv8.2-LVA */
@@ -9793,6 +9796,7 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState *env,
uint64_t va,
.tsz = tsz,
.select = select,
.tbi = tbi,
+ .tbid = tbid,
.epd = epd,
.hpd = hpd,
.using16k = using16k,
@@ -9803,7 +9807,11 @@ ARMVAParameters aa64_va_parameters_both(CPUARMState
*env, uint64_t va,
ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
ARMMMUIdx mmu_idx, bool data)
{
- return aa64_va_parameters_both(env, va, mmu_idx);
+ ARMVAParameters ret = aa64_va_parameters_both(env, va, mmu_idx);
+
+ /* Present TBI as a composite with TBID. */
+ ret.tbi &= (data || !ret.tbid);
+ return ret;
}
static ARMVAParameters aa32_va_parameters(CPUARMState *env, uint32_t va,
--
2.20.1
- [Qemu-devel] [PULL 12/49] target/arm: Decode PAuth within disas_data_proc_1src, (continued)
- [Qemu-devel] [PULL 12/49] target/arm: Decode PAuth within disas_data_proc_1src, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 29/49] target/arm: Implement pauth_auth, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 23/49] target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 27/49] target/arm: Reuse aa64_va_parameters for setting tbflags, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 30/49] target/arm: Implement pauth_addpac, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 09/49] target/arm: Add PAuth helpers, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 32/49] target/arm: Add PAuth system registers, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 14/49] target/arm: Move helper_exception_return to helper-a64.c, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 19/49] target/arm: Move cpu_mmu_index out of line, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 31/49] target/arm: Implement pauth_computepac, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 26/49] target/arm: Decode TBID from TCR,
Peter Maydell <=
- [Qemu-devel] [PULL 35/49] target/arm: Tidy TBI handling in gen_a64_set_pc, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 37/49] target/arm: Reorganize PMCCNTR accesses, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 41/49] target/arm: Implement PMOVSSET, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 43/49] target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23], Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 46/49] target/arm: PMU: Add instruction and cycle events, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 36/49] migration: Add post_save function to VMStateDescription, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 38/49] target/arm: Swap PMU values before/after migrations, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 40/49] target/arm: Allow AArch32 access for PMCCFILTR, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 42/49] target/arm: Define FIELDs for ID_DFR0, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 45/49] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER, Peter Maydell, 2019/01/18