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[Qemu-devel] [PATCH] target/hppa: fix PSW Q bit behaviour to match hardw
From: |
Sven Schnelle |
Subject: |
[Qemu-devel] [PATCH] target/hppa: fix PSW Q bit behaviour to match hardware |
Date: |
Tue, 29 Jan 2019 20:14:02 +0100 |
PA-RISC specification says: "Setting the PSW Q-bit, PSW{28}, to 1
with this instruction, if it was not already 1, is an undefined
operation." However, at least HP-UX 10.20 sets the Q bit from 0 to 1
with the SSM instruction. Tested this both on HP9000/712 and
HP9000/785/C3750, both machines set the Q bit from 0 to 1 without
exception. This makes HP-UX 10.20 progress a little bit further.
Signed-off-by: Sven Schnelle <address@hidden>
---
target/hppa/op_helper.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index 912e8d5be4..3adcfd8976 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -665,11 +665,6 @@ void HELPER(reset)(CPUHPPAState *env)
target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
{
target_ulong psw = env->psw;
- /* ??? On second reading this condition simply seems
- to be undefined rather than a diagnosed trap. */
- if (nsm & ~psw & PSW_Q) {
- hppa_dynamic_excp(env, EXCP_ILL, GETPC());
- }
env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
return psw & PSW_SM;
}
--
2.20.1
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