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[Qemu-devel] [PULL 25/47] target/arm/translate-a64: Don't underdecode sy
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 25/47] target/arm/translate-a64: Don't underdecode system instructions |
Date: |
Fri, 1 Feb 2019 16:06:31 +0000 |
The "system instructions" and "system register move" subcategories
of "branches, exception generating and system instructions" for A64
only apply if bits [23:22] are zero; other values are currently
unallocated. Correctly UNDEF these unallocated encodings.
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
---
target/arm/translate-a64.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 4d28a27c3bd..e6df303e321 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2144,7 +2144,11 @@ static void disas_b_exc_sys(DisasContext *s, uint32_t
insn)
break;
case 0x6a: /* Exception generation / System */
if (insn & (1 << 24)) {
- disas_system(s, insn);
+ if (extract32(insn, 22, 2) == 0) {
+ disas_system(s, insn);
+ } else {
+ unallocated_encoding(s);
+ }
} else {
disas_exc(s, insn);
}
--
2.20.1
- [Qemu-devel] [PULL 14/47] hw/arm/armsse: Put each CPU in its own cluster object, (continued)
- [Qemu-devel] [PULL 14/47] hw/arm/armsse: Put each CPU in its own cluster object, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 06/47] hw/arm/iotkit: Refactor into abstract base class and subclass, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 29/47] target/arm/translate-a64: Don't underdecode add/sub extended register, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 22/47] hw/arm/armsse: Add SSE-200 model, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 07/47] hw/arm/iotkit: Rename 'iotkit' local variables and functions, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 21/47] hw/arm/armsse: Add CPU_IDENTITY block to SSE-200, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 42/47] linux-user: Initialize aarch64 pac keys, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 31/47] target/arm/translate-a64: Don't underdecode SDOT and UDOT, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 27/47] target/arm/translate-a64: Don't underdecode SIMD ld/st multiple, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 35/47] target/arm: Send interrupts on PMU counter overflow, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 25/47] target/arm/translate-a64: Don't underdecode system instructions,
Peter Maydell <=
- [Qemu-devel] [PULL 40/47] aarch64-linux-user: Update HWCAP bits from linux 5.0-rc1, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 30/47] target/arm/translate-a64: Don't underdecode FP insns, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 13/47] hw/arm/armsse: Give each CPU its own view of memory, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 15/47] iotkit-sysinfo: Make SYS_VERSION and SYS_CONFIG configurable, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 19/47] hw/arm/armsse: Add unimplemented-device stub for CPU local control registers, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 41/47] aarch64-linux-user: Enable HWCAP bits for PAuth, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 33/47] target/arm/translate-a64: Fix FCMLA decoding error, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 23/47] hw/arm/mps2-tz: Add IRQ infrastructure to support SSE-200, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 17/47] hw/arm/armsse: Add unimplemented-device stubs for PPUs, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 08/47] hw/arm/iotkit: Rename files to hw/arm/armsse.[ch], Peter Maydell, 2019/02/01