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[Qemu-devel] [PULL 20/37] hw/ppc: Move ppc40x_*reset() functions from pp
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 20/37] hw/ppc: Move ppc40x_*reset() functions from ppc405_uc.c to ppc.c |
Date: |
Mon, 4 Feb 2019 20:01:07 +1100 |
From: Thomas Huth <address@hidden>
Currently, it is not possible to build a QEMU binary without the
ppc405_uc.c file, even if you do not want to have the embedded machines
in the binary. This is bad since it's quite a bit of code and this code
pulls in some more dependencies (e.g. via the usage of serial_mm_init())
which would not be needed otherwise - especially with the upcoming
Kconfig-style configuration system for QEMU.
The only functions from this file which are really always required for
linking are the ppc40x_*reset() functions, so move these functions to
ppc.c, close to the ppc40x_set_irq() function that calls them. Now we
can flag ppc405_uc.c and ppc4xx_devs.c with the CONFIG_PPC4XX config
switch, too.
And while we're at it, replace the printf()s in these ppc40x_*reset()
functions with proper calls to qemu_log_mask().
Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/Makefile.objs | 3 +--
hw/ppc/ppc.c | 56 ++++++++++++++++++++++++++++++++++++++++++
hw/ppc/ppc405_uc.c | 58 --------------------------------------------
3 files changed, 57 insertions(+), 60 deletions(-)
diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
index 4e0c1c0941..1e753de09b 100644
--- a/hw/ppc/Makefile.objs
+++ b/hw/ppc/Makefile.objs
@@ -13,8 +13,7 @@ obj-y += spapr_pci_vfio.o
endif
obj-$(CONFIG_PSERIES) += spapr_rtas_ddw.o
# PowerPC 4xx boards
-obj-y += ppc4xx_devs.o ppc405_uc.o
-obj-$(CONFIG_PPC4XX) += ppc4xx_pci.o ppc405_boards.o
+obj-$(CONFIG_PPC4XX) += ppc4xx_devs.o ppc4xx_pci.o ppc405_uc.o ppc405_boards.o
obj-$(CONFIG_PPC4XX) += ppc440_bamboo.o ppc440_pcix.o ppc440_uc.o
obj-$(CONFIG_SAM460EX) += sam460ex.o
# PReP
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index ec4be25f49..98b409f83d 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -310,6 +310,62 @@ void ppcPOWER7_irq_init(PowerPCCPU *cpu)
}
#endif /* defined(TARGET_PPC64) */
+void ppc40x_core_reset(PowerPCCPU *cpu)
+{
+ CPUPPCState *env = &cpu->env;
+ target_ulong dbsr;
+
+ qemu_log_mask(CPU_LOG_RESET, "Reset PowerPC core\n");
+ cpu_interrupt(CPU(cpu), CPU_INTERRUPT_RESET);
+ dbsr = env->spr[SPR_40x_DBSR];
+ dbsr &= ~0x00000300;
+ dbsr |= 0x00000100;
+ env->spr[SPR_40x_DBSR] = dbsr;
+}
+
+void ppc40x_chip_reset(PowerPCCPU *cpu)
+{
+ CPUPPCState *env = &cpu->env;
+ target_ulong dbsr;
+
+ qemu_log_mask(CPU_LOG_RESET, "Reset PowerPC chip\n");
+ cpu_interrupt(CPU(cpu), CPU_INTERRUPT_RESET);
+ /* XXX: TODO reset all internal peripherals */
+ dbsr = env->spr[SPR_40x_DBSR];
+ dbsr &= ~0x00000300;
+ dbsr |= 0x00000200;
+ env->spr[SPR_40x_DBSR] = dbsr;
+}
+
+void ppc40x_system_reset(PowerPCCPU *cpu)
+{
+ qemu_log_mask(CPU_LOG_RESET, "Reset PowerPC system\n");
+ qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+}
+
+void store_40x_dbcr0(CPUPPCState *env, uint32_t val)
+{
+ PowerPCCPU *cpu = ppc_env_get_cpu(env);
+
+ switch ((val >> 28) & 0x3) {
+ case 0x0:
+ /* No action */
+ break;
+ case 0x1:
+ /* Core reset */
+ ppc40x_core_reset(cpu);
+ break;
+ case 0x2:
+ /* Chip reset */
+ ppc40x_chip_reset(cpu);
+ break;
+ case 0x3:
+ /* System reset */
+ ppc40x_system_reset(cpu);
+ break;
+ }
+}
+
/* PowerPC 40x internal IRQ controller */
static void ppc40x_set_irq(void *opaque, int pin, int level)
{
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 8d3a797cb8..3ae7f6d4df 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -1155,64 +1155,6 @@ static void ppc4xx_gpt_init(hwaddr base, qemu_irq
irqs[5])
qemu_register_reset(ppc4xx_gpt_reset, gpt);
}
-/*****************************************************************************/
-/* SPR */
-void ppc40x_core_reset(PowerPCCPU *cpu)
-{
- CPUPPCState *env = &cpu->env;
- target_ulong dbsr;
-
- printf("Reset PowerPC core\n");
- cpu_interrupt(CPU(cpu), CPU_INTERRUPT_RESET);
- dbsr = env->spr[SPR_40x_DBSR];
- dbsr &= ~0x00000300;
- dbsr |= 0x00000100;
- env->spr[SPR_40x_DBSR] = dbsr;
-}
-
-void ppc40x_chip_reset(PowerPCCPU *cpu)
-{
- CPUPPCState *env = &cpu->env;
- target_ulong dbsr;
-
- printf("Reset PowerPC chip\n");
- cpu_interrupt(CPU(cpu), CPU_INTERRUPT_RESET);
- /* XXX: TODO reset all internal peripherals */
- dbsr = env->spr[SPR_40x_DBSR];
- dbsr &= ~0x00000300;
- dbsr |= 0x00000200;
- env->spr[SPR_40x_DBSR] = dbsr;
-}
-
-void ppc40x_system_reset(PowerPCCPU *cpu)
-{
- printf("Reset PowerPC system\n");
- qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
-}
-
-void store_40x_dbcr0 (CPUPPCState *env, uint32_t val)
-{
- PowerPCCPU *cpu = ppc_env_get_cpu(env);
-
- switch ((val >> 28) & 0x3) {
- case 0x0:
- /* No action */
- break;
- case 0x1:
- /* Core reset */
- ppc40x_core_reset(cpu);
- break;
- case 0x2:
- /* Chip reset */
- ppc40x_chip_reset(cpu);
- break;
- case 0x3:
- /* System reset */
- ppc40x_system_reset(cpu);
- break;
- }
-}
-
/*****************************************************************************/
/* PowerPC 405CR */
enum {
--
2.20.1
- [Qemu-devel] [PULL 04/37] ppc4xx: Use ram_addr_t in ppc4xx_sdram_adjust(), (continued)
- [Qemu-devel] [PULL 04/37] ppc4xx: Use ram_addr_t in ppc4xx_sdram_adjust(), David Gibson, 2019/02/04
- [Qemu-devel] [PULL 15/37] xive: add a get_tctx() method to the XiveRouter, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 17/37] spapr: move the interrupt presenters under machine_data, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 07/37] sam460ex: Fix support for memory larger than 1GB, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 28/37] target/ppc: rework vmul{e, o}{s, u}{b, h, w} instructions to use Vsr* macros, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 06/37] ppc4xx: Pass array index to function instead of pointer into the array, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 22/37] MAINTAINERS: Merge the two e500 sections, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 23/37] spapr: Drop unused parameters from fdt building helper, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 24/37] MAINTAINERS: add myself as maintainer for Mac Old World and New World machines, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 25/37] QemuMacDrivers: update qemu_vga.ndrv to 90c488d built from submodule, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 20/37] hw/ppc: Move ppc40x_*reset() functions from ppc405_uc.c to ppc.c,
David Gibson <=
- [Qemu-devel] [PULL 26/37] hw/ppc/spapr: Add support for "-vga cirrus", David Gibson, 2019/02/04
- [Qemu-devel] [PULL 21/37] MAINTAINERS: XIVE is an interrupt controller, not a machine, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 32/37] target/ppc: remove ROTRu32 and ROTRu64 macros from int_helper.c, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 16/37] ppc/pnv: introduce a CPU machine_data, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 37/37] mmap-alloc: fix hugetlbfs misaligned length in ppc64, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 29/37] target/ppc: eliminate use of HI_IDX and LO_IDX macros from int_helper.c, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 34/37] spapr_pci: Fix endianness in assigned-addresses property, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 31/37] target/ppc: simplify VEXT_SIGNED macro in int_helper.c, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 33/37] target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.c, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 30/37] target/ppc: eliminate use of EL_IDX macros from int_helper.c, David Gibson, 2019/02/04