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Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support
From: |
Tian, Kevin |
Subject: |
Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support |
Date: |
Thu, 14 Feb 2019 07:35:20 +0000 |
> From: Peter Xu [mailto:address@hidden
> Sent: Thursday, February 14, 2019 3:14 PM
>
> >
> > > When 256 bits invalidation descriptor is used, the guest driver
> > > should be responsible to fill in zeros into reserved fields.
> > >
> > > Another question: is val[2] & val[3] used in any place even with
> > > 256bits mode? From what I see from the spec (chap 6.5.2), all of them
> > > seems to be reserved as zeros, then I don't understand why bother
> > > extending this to 256bits... Did I miss something?
> > >
PRQ is extended to carry larger private data which requires 256bits
mode. You can take a look at 7.5.1.1 Page Request Descriptor.
Thanks
Kevin
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Peter Xu, 2019/02/12
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Yi Sun, 2019/02/13
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Peter Xu, 2019/02/13
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Yi Sun, 2019/02/13
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Peter Xu, 2019/02/13
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Yi Sun, 2019/02/14
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Peter Xu, 2019/02/14
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support,
Tian, Kevin <=
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Peter Xu, 2019/02/14
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Tian, Kevin, 2019/02/14
- Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support, Peter Xu, 2019/02/14