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[Qemu-devel] [PATCH v3 05/15] s390x/tcg: Hide IEEE underflows in some sc
From: |
David Hildenbrand |
Subject: |
[Qemu-devel] [PATCH v3 05/15] s390x/tcg: Hide IEEE underflows in some scenarios |
Date: |
Mon, 18 Feb 2019 13:27:00 +0100 |
IEEE underflows are not reported when the mask bit is off and we don't
also have an inexact exception.
z14 PoP, 9-20, "IEEE Underflow":
An IEEE-underflow exception is recognized for an
IEEE target when the tininess condition exists and
either: (1) the IEEE-underflow mask bit in the FPC
register is zero and the result value is inexact, or (2)
the IEEE-underflow mask bit in the FPC register is
one.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
---
target/s390x/fpu_helper.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c
index dcad9c367a..64efab72a4 100644
--- a/target/s390x/fpu_helper.c
+++ b/target/s390x/fpu_helper.c
@@ -63,6 +63,19 @@ static void handle_exceptions(CPUS390XState *env, uintptr_t
retaddr)
env->fpu_status.float_exception_flags = 0;
s390_exc = s390_softfloat_exc_to_ieee(qemu_exc);
+ /*
+ * IEEE-Underflow exception recognition exists if a tininess condition
+ * (underflow) exists and
+ * - The mask bit in the FPC is zero and the result is inexact
+ * - The mask bit in the FPC is one
+ * So tininess conditions that are not inexact don't trigger any
+ * underflow action in case the mask bit is not one.
+ */
+ if (!(s390_exc & S390_IEEE_MASK_INEXACT) &&
+ !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) {
+ s390_exc &= ~S390_IEEE_MASK_UNDERFLOW;
+ }
+
/*
* FIXME:
* 1. Right now, all inexact conditions are inidicated as
--
2.17.2
- [Qemu-devel] [PATCH v3 00/15] s390x/tcg: Implement floating-point extension facility, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 01/15] s390x/tcg: Fix TEST DATA CLASS instructions, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 02/15] s390x/tcg: Fix rounding from float128 to uint64_t/uin32_t, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 04/15] s390x/tcg: Fix parts of IEEE exception handling, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 03/15] s390x/tcg: Factor out conversion of softfloat exceptions, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 06/15] s390x/tcg: Refactor SET FPC AND SIGNAL handling, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 05/15] s390x/tcg: Hide IEEE underflows in some scenarios,
David Hildenbrand <=
- [Qemu-devel] [PATCH v3 07/15] s390x/tcg: Fix simulated-IEEE exceptions, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 08/15] s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modes, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 09/15] s390x/tcg: Check for exceptions in SET BFP ROUNDING MODE, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 10/15] s390x/tcg: Refactor saving/restoring the bfp rounding mode, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 11/15] s390x/tcg: Prepare for IEEE-inexact-exception control (XxC), David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 12/15] s390x/tcg: Implement XxC and checks for most FP instructions, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 13/15] s390x/tcg: Implement rounding mode and XxC for LOAD ROUNDED, David Hildenbrand, 2019/02/18
- [Qemu-devel] [PATCH v3 14/15] s390x/tcg: Handle all rounding modes overwritten by BFP instructions, David Hildenbrand, 2019/02/18