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[Qemu-devel] [PULL 05/50] target/ppc: Rename "in_pm_state" to "resume_as
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 05/50] target/ppc: Rename "in_pm_state" to "resume_as_sreset" |
Date: |
Tue, 26 Feb 2019 15:52:19 +1100 |
From: Benjamin Herrenschmidt <address@hidden>
To better reflect what this does, as it's specific to some of the
P7/P8/P9 PM states, not generic.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/ppc.c | 2 +-
target/ppc/cpu.h | 6 +++---
target/ppc/excp_helper.c | 8 ++++----
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index cffdc3914a..12439dbe5d 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -776,7 +776,7 @@ static inline void cpu_ppc_hdecr_excp(PowerPCCPU *cpu)
* interrupts in a PM state. Not only they don't cause a
* wakeup but they also get effectively discarded.
*/
- if (!env->in_pm_state) {
+ if (!env->resume_as_sreset) {
ppc_set_irq(cpu, PPC_INTERRUPT_HDECR, 1);
}
}
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 5b1899bfc9..d2364564a0 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1117,10 +1117,10 @@ struct CPUPPCState {
/*
* On P7/P8/P9, set when in PM state, we need to handle resume in
- * a special way (such as routing some resume causes to 0x100), so
- * flag this here.
+ * a special way (such as routing some resume causes to 0x100, ie,
+ * sreset), so flag this here.
*/
- bool in_pm_state;
+ bool resume_as_sreset;
#endif
/* Those resources are used only during code translation */
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 489a54f51b..7536620a41 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -69,7 +69,7 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState
*env, int excp,
target_ulong *msr)
{
/* We no longer are in a PM state */
- env->in_pm_state = false;
+ env->resume_as_sreset = false;
/* Pretend to be returning from doze always as we don't lose state */
*msr |= (0x1ull << (63 - 47));
@@ -141,7 +141,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
excp_model, int excp)
* check for special resume at 0x100 from doze/nap/sleep/winkle on
* P7/P8/P9
*/
- if (env->in_pm_state) {
+ if (env->resume_as_sreset) {
excp = powerpc_reset_wakeup(cs, env, excp, &msr);
}
@@ -787,7 +787,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)
* clear when coming out of some power management states (in order
* for them to become a 0x100).
*/
- async_deliver = (msr_ee != 0) || env->in_pm_state;
+ async_deliver = (msr_ee != 0) || env->resume_as_sreset;
/* Hypervisor decrementer exception */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {
@@ -970,7 +970,7 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn)
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR);
/* Condition for waking up at 0x100 */
- env->in_pm_state = (insn != PPC_PM_STOP) ||
+ env->resume_as_sreset = (insn != PPC_PM_STOP) ||
(env->spr[SPR_PSSCR] & PSSCR_EC);
}
#endif /* defined(TARGET_PPC64) */
--
2.20.1
- [Qemu-devel] [PULL 00/50] ppc-for-4.0 queue 20190226, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 03/50] target/ppc: Fix support for "STOP light" states on POWER9, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 02/50] target/ppc: Don't clobber MSR:EE on PM instructions, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 04/50] target/ppc: Move "wakeup reset" code to a separate function, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 01/50] target/ppc: Fix nip on power management instructions, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 13/50] spapr: support memory unplug for qtest, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 10/50] target/ppc: Add support for LPCR:HEIC on POWER9, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 05/50] target/ppc: Rename "in_pm_state" to "resume_as_sreset",
David Gibson <=
- [Qemu-devel] [PULL 08/50] target/ppc: Add Hypervisor Virtualization Interrupt on POWER9, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 11/50] ppc: add host-serial and host-model machine attributes (CVE-2019-8934), David Gibson, 2019/02/25
- [Qemu-devel] [PULL 09/50] target/ppc: Add POWER9 external interrupt model, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 07/50] target/ppc: Detect erroneous condition in interrupt delivery, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 06/50] target/ppc: Add POWER9 exception model, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 19/50] target/ppc/mmu: Use LPCR:HR to chose radix vs. hash translation, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 15/50] tests/device-plug: Add CCW unplug test for s390x, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 20/50] target/ppc: Re-enable RMLS on POWER9 for virtual hypervisors, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 24/50] target/ppc: Fix synchronization of mttcg with broadcast TLB flushes, David Gibson, 2019/02/25
- [Qemu-devel] [PULL 14/50] tests/device-plug: Add a simple PCI unplug request test, David Gibson, 2019/02/25