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Re: [Qemu-devel] [PATCH 1/2] target/arm: Implement ARMv8.0-SB
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 1/2] target/arm: Implement ARMv8.0-SB |
Date: |
Wed, 27 Feb 2019 17:18:27 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 2/26/19 10:31 AM, Peter Maydell wrote:
> On Wed, 20 Feb 2019 at 23:50, Richard Henderson
> <address@hidden> wrote:
>>
>> Signed-off-by: Richard Henderson <address@hidden>
>
>
>> @@ -9192,6 +9192,17 @@ static void disas_arm_insn(DisasContext *s, unsigned
>> int insn)
>> */
>> gen_goto_tb(s, 0, s->pc & ~1);
>> return;
>> + case 7: /* sb */
>> + if (!dc_isar_feature(aa32_sb, s)) {
>> + goto illegal_op;
>> + }
>> + /*
>> + * TODO: There is no speculation barrier opcode
>> + * for TCG; MB and end the TB instead.
>> + */
>> + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
>> + s->base.is_jmp = DISAS_TOO_MANY;
>
> Why do we do the "end the TB" code differently here than we
> do for the implementation of ISB in the case immediately
> above ?
No good reason, I suppose. This is how we end the TB for MSR, I think. But I
can change it.
r~