[Bug 1663287] Re: Illegal delay slot code causes abort on mips64

[martin short]

When I reread the thread I see Brian was doing some testing/fuzzing,
that's why he found that out.

I managed to get my old router running. It's BCM5354 (BCM3302 v2.9) running on 
Linux 2.4.35.
I used the following code (gnu as compiled but replaced the nop after branch 
with the branch instruction above):

  4000d0:       10000003        b       4000e0 <__start+0x10>
  4000d4:       45454545        0x45454545
        ...
  4000e0:       2404002a        li      a0,42
  4000e4:       24020fa1        li      v0,4001
  4000e8:       0000000c        syscall
  4000ec:       00000000        nop

Program was terminated with the trap Illegal instruction.

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https://bugs.launchpad.net/bugs/1663287

Title:
  Illegal delay slot code causes abort on mips64

Status in QEMU:
  New

Bug description:
  During some randomised testing of an experimental MIPS implementation
  I found an instruction sequence that also causes aborts on mainline
  qemu's MIPS support.  The problem is triggered by an MSA branch
  instruction appearing in a delay slot when emulating a processor
  without MSA support.

  For example, with the current repository HEAD
  (f073cd3a2bf1054135271b837c58a7da650dd84b) configured for
  mips64-softmmu, if I run the attached binary using

      mips64-softmmu/qemu-system-mips64 -bios ../abort2.bin -machine
  mipssim -nographic

  it will report

      unknown branch 0x13000
      Aborted (core dumped)

  The binary contains the following two instructions:

      00200008 jr at
      47081e61 bz.b       w8,0xffffffffbfc0798c

  The jr sets up a jump, and hflags is set accordingly in
  gen_compute_branch (in target/mips/translate.c).  When processing the
  bz.b, check_insn generates an exception because the instruction isn't
  support, but gen_msa_branch skips the usual delay slot check for the
  same reason, and sets more bits in hflags, leading to an abort in
  gen_branch because the hflags are now invalid.

  I suspect the best fix is to remove the instruction set condition from
  the delay slot check in gen_msa_branch.

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