Re: [PATCH v4 0/7] target/riscv: Add XVentanaCondOps and supporting infrastructure changes

[Philipp Tomsich]

On Mon, 31 Jan 2022 at 09:25, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 1/31/22 10:57, Philipp Tomsich wrote:
> >
> > In adding our first X-extension (i.e., vendor-defined) on RISC-V with
> > XVentanaCondOps, we need to add a few instructure improvements to make
> > it easier to add similar vendor-defined extensions in the future:
> > - refactor access to the cfg->ext_* fields by making a pointer to the
> >    cfg structure (as cfg_ptr) available via DisasContext
> > - add a table-based list of decoders to invoke, each being guarded by
> >    a guard/predicate-function, that can be used to either add vendor
> >    extensions, large extensions or override (by listing the decoder
> >    before the one for standard extensions) patterns to handle errata
> >
> >
> > Changes in v4:
> > - use a typedef into 'RISCVCPUConfig' (instead of the explicit
> >    'struct RISCVCPUConfig') to comply with the coding standard
> >    (as suggested in Richard's review of v3)
> > - add braces to comply with coding standard (as suggested by Richard)
> > - merge the two if-statements to reduce clutter after (now that the
> >    braces have been added)
>
>
> Pick up Reviewed-by tags where they're given.  Please go back and grab them 
> from v3.


Thanks for spotting this.  Looks like patman picked those up only for
the first two patches.
I'll go back and add them by hand.

Philipp.