[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 18/39] hw/arm/boot: Don't write secondary boot stub if using PSCI
From: |
Peter Maydell |
Subject: |
[PULL 18/39] hw/arm/boot: Don't write secondary boot stub if using PSCI |
Date: |
Tue, 8 Feb 2022 11:39:27 +0000 |
If we're using PSCI emulation to start secondary CPUs, there is no
point in writing the "secondary boot" stub code, because it will
never be used -- secondary CPUs start powered-off, and when powered
on are set to begin execution at the address specified by the guest's
power-on PSCI call, not at the stub.
Move the call to the hook that writes the secondary boot stub code so
that we can do it only if we're starting a Linux kernel and not using
PSCI.
(None of the users of the hook care about the ordering of its call
relative to anything else: they only use it to write a rom blob to
guest memory.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Tested-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Message-id: 20220127154639.2090164-14-peter.maydell@linaro.org
---
include/hw/arm/boot.h | 3 +++
hw/arm/boot.c | 35 ++++++++++++++++++++++++-----------
2 files changed, 27 insertions(+), 11 deletions(-)
diff --git a/include/hw/arm/boot.h b/include/hw/arm/boot.h
index 0bcb58babba..0cfc1c95c4e 100644
--- a/include/hw/arm/boot.h
+++ b/include/hw/arm/boot.h
@@ -70,6 +70,9 @@ struct arm_boot_info {
* boot loader/boot ROM code, and secondary_cpu_reset_hook() should
* perform any necessary CPU reset handling and set the PC for the
* secondary CPUs to point at this boot blob.
+ *
+ * These hooks won't be called if secondary CPUs are booting via
+ * emulated PSCI (see psci_conduit below).
*/
void (*write_secondary_boot)(ARMCPU *cpu,
const struct arm_boot_info *info);
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 0424c178305..184628ce564 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -804,7 +804,7 @@ static void do_cpu_reset(void *opaque)
set_kernel_args(info, as);
}
}
- } else {
+ } else if (info->secondary_cpu_reset_hook) {
info->secondary_cpu_reset_hook(cpu, info);
}
}
@@ -1030,13 +1030,6 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
elf_machine = EM_ARM;
}
- if (!info->secondary_cpu_reset_hook) {
- info->secondary_cpu_reset_hook = default_reset_secondary;
- }
- if (!info->write_secondary_boot) {
- info->write_secondary_boot = default_write_secondary;
- }
-
if (info->nb_cpus == 0)
info->nb_cpus = 1;
@@ -1216,9 +1209,6 @@ static void arm_setup_direct_kernel_boot(ARMCPU *cpu,
write_bootloader("bootloader", info->loader_start,
primary_loader, fixupcontext, as);
- if (info->nb_cpus > 1) {
- info->write_secondary_boot(cpu, info);
- }
if (info->write_board_setup) {
info->write_board_setup(cpu, info);
}
@@ -1385,6 +1375,29 @@ void arm_load_kernel(ARMCPU *cpu, MachineState *ms,
struct arm_boot_info *info)
}
}
+ if (info->psci_conduit == QEMU_PSCI_CONDUIT_DISABLED &&
+ info->is_linux && info->nb_cpus > 1) {
+ /*
+ * We're booting Linux but not using PSCI, so for SMP we need
+ * to write a custom secondary CPU boot loader stub, and arrange
+ * for the secondary CPU reset to make the accompanying initialization.
+ */
+ if (!info->secondary_cpu_reset_hook) {
+ info->secondary_cpu_reset_hook = default_reset_secondary;
+ }
+ if (!info->write_secondary_boot) {
+ info->write_secondary_boot = default_write_secondary;
+ }
+ info->write_secondary_boot(cpu, info);
+ } else {
+ /*
+ * No secondary boot stub; don't use the reset hook that would
+ * have set the CPU up to call it
+ */
+ info->write_secondary_boot = NULL;
+ info->secondary_cpu_reset_hook = NULL;
+ }
+
/*
* arm_load_dtb() may add a PSCI node so it must be called after we have
* decided whether to enable PSCI and set the psci-conduit CPU properties.
--
2.25.1
- [PULL 16/39] hw/arm/highbank: Drop use of secure_board_setup, (continued)
- [PULL 16/39] hw/arm/highbank: Drop use of secure_board_setup, Peter Maydell, 2022/02/08
- [PULL 23/39] arm: force flag recalculation when messing with DAIF, Peter Maydell, 2022/02/08
- [PULL 22/39] hw/arm: versal-virt: Always call arm_load_kernel(), Peter Maydell, 2022/02/08
- [PULL 20/39] hw/arm/boot: Drop nb_cpus field from arm_boot_info, Peter Maydell, 2022/02/08
- [PULL 21/39] hw/arm/boot: Drop existing dtb /psci node rather than retaining it, Peter Maydell, 2022/02/08
- [PULL 26/39] hw/intc/arm_gicv3_its: Use address_space_map() to access command queue packets, Peter Maydell, 2022/02/08
- [PULL 24/39] hw/timer/armv7m_systick: Update clock source before enabling timer, Peter Maydell, 2022/02/08
- [PULL 33/39] hw/intc/arm_gicv3_its: Pass ITE values back from get_ite() via a struct, Peter Maydell, 2022/02/08
- [PULL 30/39] hw/intc/arm_gicv3_its: Pass CTEntry to update_cte(), Peter Maydell, 2022/02/08
- [PULL 31/39] hw/intc/arm_gicv3_its: Fix address calculation in get_ite() and update_ite(), Peter Maydell, 2022/02/08
- [PULL 18/39] hw/arm/boot: Don't write secondary boot stub if using PSCI,
Peter Maydell <=
- [PULL 25/39] hw/arm/smmuv3: Fix device reset, Peter Maydell, 2022/02/08
- [PULL 36/39] hw/intc/arm_gicv3_its: In MAPC with V=0, don't check rdbase field, Peter Maydell, 2022/02/08
- [PULL 34/39] hw/intc/arm_gicv3_its: Make update_ite() use ITEntry, Peter Maydell, 2022/02/08
- [PULL 19/39] hw/arm/highbank: Drop unused secondary boot stub code, Peter Maydell, 2022/02/08
- [PULL 35/39] hw/intc/arm_gicv3_its: Drop TableDesc and CmdQDesc valid fields, Peter Maydell, 2022/02/08
- [PULL 37/39] hw/intc/arm_gicv3_its: Don't allow intid 1023 in MAPI/MAPTI, Peter Maydell, 2022/02/08
- [PULL 32/39] hw/intc/arm_gicv3_its: Avoid nested ifs in get_ite(), Peter Maydell, 2022/02/08
- [PULL 38/39] hw/intc/arm_gicv3_its: Split error checks, Peter Maydell, 2022/02/08
- Re: [PULL 00/39] target-arm queue, Peter Maydell, 2022/02/08