Re: [PATCH v2 5/8] x86: Add AMX CPUIDs enumeration

[David Edmondson]

On Wednesday, 2022-02-16 at 22:04:31 -08, Yang Zhong wrote:

> From: Jing Liu <jing2.liu@intel.com>
>
> Add AMX primary feature bits XFD and AMX_TILE to
> enumerate the CPU's AMX capability. Meanwhile, add
> AMX TILE and TMUL CPUID leaf and subleaves which
> exist when AMX TILE is present to provide the maximum
> capability of TILE and TMUL.
>
> Signed-off-by: Jing Liu <jing2.liu@intel.com>
> Signed-off-by: Yang Zhong <yang.zhong@intel.com>

Reviewed-by: David Edmondson <david.edmondson@oracle.com>

> ---
>  target/i386/cpu.c     | 55 ++++++++++++++++++++++++++++++++++++++++---
>  target/i386/kvm/kvm.c |  4 +++-
>  2 files changed, 55 insertions(+), 4 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 5a7ee8c7e1..2465bed5df 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -576,6 +576,18 @@ static CPUCacheInfo legacy_l3_cache = {
>  #define INTEL_PT_CYCLE_BITMAP    0x1fff         /* Support 0,2^(0~11) */
>  #define INTEL_PT_PSB_BITMAP      (0x003f << 16) /* Support 
> 2K,4K,8K,16K,32K,64K */
>
> +/* CPUID Leaf 0x1D constants: */
> +#define INTEL_AMX_TILE_MAX_SUBLEAF     0x1
> +#define INTEL_AMX_TOTAL_TILE_BYTES     0x2000
> +#define INTEL_AMX_BYTES_PER_TILE       0x400
> +#define INTEL_AMX_BYTES_PER_ROW        0x40
> +#define INTEL_AMX_TILE_MAX_NAMES       0x8
> +#define INTEL_AMX_TILE_MAX_ROWS        0x10
> +
> +/* CPUID Leaf 0x1E constants: */
> +#define INTEL_AMX_TMUL_MAX_K           0x10
> +#define INTEL_AMX_TMUL_MAX_N           0x40
> +
>  void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
>                                uint32_t vendor2, uint32_t vendor3)
>  {
> @@ -845,8 +857,8 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
>              "avx512-vp2intersect", NULL, "md-clear", NULL,
>              NULL, NULL, "serialize", NULL,
>              "tsx-ldtrk", NULL, NULL /* pconfig */, NULL,
> -            NULL, NULL, NULL, "avx512-fp16",
> -            NULL, NULL, "spec-ctrl", "stibp",
> +            NULL, NULL, "amx-bf16", "avx512-fp16",
> +            "amx-tile", "amx-int8", "spec-ctrl", "stibp",
>              NULL, "arch-capabilities", "core-capability", "ssbd",
>          },
>          .cpuid = {
> @@ -911,7 +923,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
>          .type = CPUID_FEATURE_WORD,
>          .feat_names = {
>              "xsaveopt", "xsavec", "xgetbv1", "xsaves",
> -            NULL, NULL, NULL, NULL,
> +            "xfd", NULL, NULL, NULL,
>              NULL, NULL, NULL, NULL,
>              NULL, NULL, NULL, NULL,
>              NULL, NULL, NULL, NULL,
> @@ -5587,6 +5599,43 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, 
> uint32_t count,
>          }
>          break;
>      }
> +    case 0x1D: {
> +        /* AMX TILE */
> +        *eax = 0;
> +        *ebx = 0;
> +        *ecx = 0;
> +        *edx = 0;
> +        if (!(env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_AMX_TILE)) {
> +            break;
> +        }
> +
> +        if (count == 0) {
> +            /* Highest numbered palette subleaf */
> +            *eax = INTEL_AMX_TILE_MAX_SUBLEAF;
> +        } else if (count == 1) {
> +            *eax = INTEL_AMX_TOTAL_TILE_BYTES |
> +                   (INTEL_AMX_BYTES_PER_TILE << 16);
> +            *ebx = INTEL_AMX_BYTES_PER_ROW | (INTEL_AMX_TILE_MAX_NAMES << 
> 16);
> +            *ecx = INTEL_AMX_TILE_MAX_ROWS;
> +        }
> +        break;
> +    }
> +    case 0x1E: {
> +        /* AMX TMUL */
> +        *eax = 0;
> +        *ebx = 0;
> +        *ecx = 0;
> +        *edx = 0;
> +        if (!(env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_AMX_TILE)) {
> +            break;
> +        }
> +
> +        if (count == 0) {
> +            /* Highest numbered palette subleaf */
> +            *ebx = INTEL_AMX_TMUL_MAX_K | (INTEL_AMX_TMUL_MAX_N << 8);
> +        }
> +        break;
> +    }
>      case 0x40000000:
>          /*
>           * CPUID code in kvm_arch_init_vcpu() ignores stuff
> diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
> index 3bdcd724c4..8562d3d138 100644
> --- a/target/i386/kvm/kvm.c
> +++ b/target/i386/kvm/kvm.c
> @@ -1779,7 +1779,9 @@ int kvm_arch_init_vcpu(CPUState *cs)
>                  c = &cpuid_data.entries[cpuid_i++];
>              }
>              break;
> -        case 0x14: {
> +        case 0x14:
> +        case 0x1d:
> +        case 0x1e: {
>              uint32_t times;
>
>              c->function = i;

dme.
-- 
Why does it have to be like this? I can never tell.