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[PATCH 01/14] target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate
From: |
Peter Maydell |
Subject: |
[PATCH 01/14] target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault |
Date: |
Fri, 14 Jul 2023 16:46:35 +0100 |
For an Unsupported Atomic Update fault where the stage 1 translation
table descriptor update can't be done because it's to an unsupported
memory type, this is a stage 1 abort (per the Arm ARM R_VSXXT). This
means we should not set fi->s1ptw, because this will cause the code
in the get_phys_addr_lpae() error-exit path to mark it as stage 2.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/ptw.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 8f94100c61f..bafeb876ad7 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -701,7 +701,6 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t
old_val,
if (unlikely(!host)) {
fi->type = ARMFault_UnsuppAtomicUpdate;
- fi->s1ptw = true;
return 0;
}
--
2.34.1
- [PATCH 00/14] target/arm/ptw: Cleanups and a few bugfixes, Peter Maydell, 2023/07/14
- [PATCH 03/14] target/arm/ptw: Set s1ns bit in fault info more consistently, Peter Maydell, 2023/07/14
- [PATCH 01/14] target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault,
Peter Maydell <=
- [PATCH 02/14] target/arm/ptw: Don't report GPC faults on stage 1 ptw as stage2 faults, Peter Maydell, 2023/07/14
- [PATCH 05/14] target/arm/ptw: Pass ARMSecurityState to regime_translation_disabled(), Peter Maydell, 2023/07/14
- [PATCH 07/14] target/arm/ptw: Only fold in NSTable bit effects in Secure state, Peter Maydell, 2023/07/14
- [PATCH 06/14] target/arm/ptw: Pass an ARMSecuritySpace to arm_hcr_el2_eff_secstate(), Peter Maydell, 2023/07/14