On 8/9/23 01:26, Jiajie Chen wrote:
LoongArch64-only instructions are marked with regard to the instruction
manual Table 2. LSX instructions are not marked for now for lack of
public manual.
I would expect LSX not to be affected by CPUCFG.1.ARCH, but only by
CPUCFG.2.LSX.
Note that there appears to be a bug with respect to LSX, in that
CPUCFG.2.LSX is not checked. The manual is not clear, but I would
expect CPUCFG.2.LSX == 0 to trigger an illegal instruction exception
before the check for EUEN.SXE == 0 to trigger an instruction disabl > exception. Also, are bit in EUEN allowed to be set to non-zero values
when the corresponding expansion is not present?