[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 56/61] target/hppa: Implement MIXH, MIXW
From: |
Richard Henderson |
Subject: |
[PATCH 56/61] target/hppa: Implement MIXH, MIXW |
Date: |
Wed, 18 Oct 2023 14:51:30 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/insns.decode | 5 ++++
target/hppa/translate.c | 55 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 60 insertions(+)
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index d7befbf73d..323e9275bf 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -233,6 +233,11 @@ hsub 000010 ..... ..... 00000001 11 0 .....
@rrr
hsub_ss 000010 ..... ..... 00000001 01 0 ..... @rrr
hsub_us 000010 ..... ..... 00000001 00 0 ..... @rrr
+mixh_l 111110 ..... ..... 1 00 00100000 ..... @rrr
+mixh_r 111110 ..... ..... 1 10 00100000 ..... @rrr
+mixw_l 111110 ..... ..... 1 00 00000000 ..... @rrr
+mixw_r 111110 ..... ..... 1 10 00000000 ..... @rrr
+
####
# Index Mem
####
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index b0aefecd2e..bd8a858da6 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2863,6 +2863,61 @@ static bool trans_hsub_us(DisasContext *ctx, arg_rrr *a)
return do_multimedia(ctx, a, gen_helper_hsub_us);
}
+static void gen_mixh_l(TCGv_i64 dst, TCGv_i64 r1, TCGv_i64 r2)
+{
+ uint64_t mask = 0xffff0000ffff0000ull;
+ TCGv_i64 tmp = tcg_temp_new_i64();
+
+ tcg_gen_andi_i64(tmp, r2, mask);
+ tcg_gen_andi_i64(dst, r1, mask);
+ tcg_gen_shri_i64(tmp, tmp, 16);
+ tcg_gen_or_i64(dst, dst, tmp);
+}
+
+static bool trans_mixh_l(DisasContext *ctx, arg_rrr *a)
+{
+ return do_multimedia(ctx, a, gen_mixh_l);
+}
+
+static void gen_mixh_r(TCGv_i64 dst, TCGv_i64 r1, TCGv_i64 r2)
+{
+ uint64_t mask = 0x0000ffff0000ffffull;
+ TCGv_i64 tmp = tcg_temp_new_i64();
+
+ tcg_gen_andi_i64(tmp, r1, mask);
+ tcg_gen_andi_i64(dst, r2, mask);
+ tcg_gen_shli_i64(tmp, tmp, 16);
+ tcg_gen_or_i64(dst, dst, tmp);
+}
+
+static bool trans_mixh_r(DisasContext *ctx, arg_rrr *a)
+{
+ return do_multimedia(ctx, a, gen_mixh_r);
+}
+
+static void gen_mixw_l(TCGv_i64 dst, TCGv_i64 r1, TCGv_i64 r2)
+{
+ TCGv_i64 tmp = tcg_temp_new_i64();
+
+ tcg_gen_shri_i64(tmp, r2, 32);
+ tcg_gen_deposit_i64(dst, r1, tmp, 0, 32);
+}
+
+static bool trans_mixw_l(DisasContext *ctx, arg_rrr *a)
+{
+ return do_multimedia(ctx, a, gen_mixw_l);
+}
+
+static void gen_mixw_r(TCGv_i64 dst, TCGv_i64 r1, TCGv_i64 r2)
+{
+ tcg_gen_deposit_i64(dst, r2, r1, 32, 32);
+}
+
+static bool trans_mixw_r(DisasContext *ctx, arg_rrr *a)
+{
+ return do_multimedia(ctx, a, gen_mixw_r);
+}
+
static bool trans_ld(DisasContext *ctx, arg_ldst *a)
{
if (!ctx->is_pa20 && a->size > MO_32) {
--
2.34.1
- [PATCH 42/61] target/hppa: Implement SHRPD, (continued)
- [PATCH 42/61] target/hppa: Implement SHRPD, Richard Henderson, 2023/10/18
- [PATCH 46/61] target/hppa: Remove TARGET_REGISTER_BITS, Richard Henderson, 2023/10/18
- [PATCH 47/61] target/hppa: Remove most of the TARGET_REGISTER_BITS redirections, Richard Henderson, 2023/10/18
- [PATCH 50/61] target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64, Richard Henderson, 2023/10/18
- [PATCH 52/61] target/hppa: Implement HSUB, Richard Henderson, 2023/10/18
- [PATCH 48/61] target/hppa: Remove remaining TARGET_REGISTER_BITS redirections, Richard Henderson, 2023/10/18
- [PATCH 49/61] target/hppa: Use tcg_temp_new_i64 not tcg_temp_new, Richard Henderson, 2023/10/18
- [PATCH 51/61] target/hppa: Implement HADD, Richard Henderson, 2023/10/18
- [PATCH 53/61] target/hppa: Implement HAVG, Richard Henderson, 2023/10/18
- [PATCH 54/61] target/hppa: Implement HSHL, HSHR, Richard Henderson, 2023/10/18
- [PATCH 56/61] target/hppa: Implement MIXH, MIXW,
Richard Henderson <=
- [PATCH 55/61] target/hppa: Implement HSHLADD, HSHRADD, Richard Henderson, 2023/10/18
- [PATCH 58/61] target/hppa: Fix interruption based on default PSW, Richard Henderson, 2023/10/18
- [PATCH 59/61] target/hppa: Precompute zero into DisasContext, Richard Henderson, 2023/10/18
- [PATCH 57/61] target/hppa: Implement PERMH, Richard Henderson, 2023/10/18
- [PATCH 61/61] target/hppa: Simplify trans_dep*_imm, Richard Henderson, 2023/10/18
- [PATCH 60/61] target/hppa: Return zero for r0 from load_gpr, Richard Henderson, 2023/10/18