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[PATCH RFC v2 01/12] hw/pci: Initialize PCI multifunction after realizat


From: Akihiko Odaki
Subject: [PATCH RFC v2 01/12] hw/pci: Initialize PCI multifunction after realization
Date: Sun, 10 Dec 2023 13:05:44 +0900

The device realization code may enable PCI multifunction for SR-IOV.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---
 hw/pci/pci.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index c49417abb2..4cf31128ba 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -940,8 +940,9 @@ static void pci_init_mask_bridge(PCIDevice *d)
                                PCI_PREF_RANGE_TYPE_MASK);
 }
 
-static void pci_init_multifunction(PCIBus *bus, PCIDevice *dev, Error **errp)
+static void pci_init_multifunction(PCIDevice *dev, Error **errp)
 {
+    PCIBus *bus = pci_get_bus(dev);
     uint8_t slot = PCI_SLOT(dev->devfn);
     uint8_t func;
 
@@ -1140,7 +1141,6 @@ static PCIDevice *do_pci_register_device(PCIDevice 
*pci_dev,
     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(pci_dev);
     PCIConfigReadFunc *config_read = pc->config_read;
     PCIConfigWriteFunc *config_write = pc->config_write;
-    Error *local_err = NULL;
     DeviceState *dev = DEVICE(pci_dev);
     PCIBus *bus = pci_get_bus(pci_dev);
     bool is_bridge = IS_PCI_BRIDGE(pci_dev);
@@ -1233,12 +1233,6 @@ static PCIDevice *do_pci_register_device(PCIDevice 
*pci_dev,
     if (is_bridge) {
         pci_init_mask_bridge(pci_dev);
     }
-    pci_init_multifunction(bus, pci_dev, &local_err);
-    if (local_err) {
-        error_propagate(errp, local_err);
-        do_pci_unregister_device(pci_dev);
-        return NULL;
-    }
 
     if (!config_read)
         config_read = pci_default_read_config;
@@ -2122,6 +2116,13 @@ static void pci_qdev_realize(DeviceState *qdev, Error 
**errp)
         }
     }
 
+    pci_init_multifunction(pci_dev, &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
+        pci_qdev_unrealize(DEVICE(pci_dev));
+        return;
+    }
+
     /*
      * A PCIe Downstream Port that do not have ARI Forwarding enabled must
      * associate only Device 0 with the device attached to the bus

-- 
2.43.0




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