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[PATCH v3 32/38] tcg/ppc: Tidy up tcg_target_const_match
From: |
Richard Henderson |
Subject: |
[PATCH v3 32/38] tcg/ppc: Tidy up tcg_target_const_match |
Date: |
Thu, 11 Jan 2024 09:44:02 +1100 |
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/ppc/tcg-target.c.inc | 27 ++++++++++++++++-----------
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index b9323baa86..26e0bc31d7 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -282,31 +282,36 @@ static bool reloc_pc34(tcg_insn_unit *src_rw, const
tcg_insn_unit *target)
}
/* test if a constant matches the constraint */
-static bool tcg_target_const_match(int64_t val, int ct,
+static bool tcg_target_const_match(int64_t sval, int ct,
TCGType type, TCGCond cond, int vece)
{
+ uint64_t uval = sval;
+
if (ct & TCG_CT_CONST) {
return 1;
}
- /* The only 32-bit constraint we use aside from
- TCG_CT_CONST is TCG_CT_CONST_S16. */
if (type == TCG_TYPE_I32) {
- val = (int32_t)val;
+ uval = (uint32_t)sval;
+ sval = (int32_t)sval;
}
- if ((ct & TCG_CT_CONST_S16) && val == (int16_t)val) {
+ if ((ct & TCG_CT_CONST_S16) && sval == (int16_t)sval) {
return 1;
- } else if ((ct & TCG_CT_CONST_S32) && val == (int32_t)val) {
+ }
+ if ((ct & TCG_CT_CONST_S32) && sval == (int32_t)sval) {
return 1;
- } else if ((ct & TCG_CT_CONST_U32) && val == (uint32_t)val) {
+ }
+ if ((ct & TCG_CT_CONST_U32) && uval == (uint32_t)uval) {
return 1;
- } else if ((ct & TCG_CT_CONST_ZERO) && val == 0) {
+ }
+ if ((ct & TCG_CT_CONST_ZERO) && sval == 0) {
return 1;
- } else if ((ct & TCG_CT_CONST_MONE) && val == -1) {
+ }
+ if ((ct & TCG_CT_CONST_MONE) && sval == -1) {
return 1;
- } else if ((ct & TCG_CT_CONST_WSZ)
- && val == (type == TCG_TYPE_I32 ? 32 : 64)) {
+ }
+ if ((ct & TCG_CT_CONST_WSZ) && sval == (type == TCG_TYPE_I32 ? 32 : 64)) {
return 1;
}
return 0;
--
2.34.1
- [PATCH v3 19/38] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX, (continued)
- [PATCH v3 19/38] tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX, Richard Henderson, 2024/01/10
- [PATCH v3 20/38] tcg/arm: Factor tcg_out_cmp() out, Richard Henderson, 2024/01/10
- [PATCH v3 22/38] tcg/i386: Pass x86 condition codes to tcg_out_cmov, Richard Henderson, 2024/01/10
- [PATCH v3 24/38] tcg/i386: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 31/38] tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel, Richard Henderson, 2024/01/10
- [PATCH v3 17/38] tcg/aarch64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 32/38] tcg/ppc: Tidy up tcg_target_const_match,
Richard Henderson <=
- [PATCH v3 25/38] tcg/i386: Improve TSTNE/TESTEQ vs powers of two, Richard Henderson, 2024/01/10
- [PATCH v3 26/38] tcg/i386: Use TEST r,r to test 8/16/32 bits, Richard Henderson, 2024/01/10
- [PATCH v3 23/38] tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp, Richard Henderson, 2024/01/10
- [PATCH v3 27/38] tcg/sparc64: Hoist read of tcg_cond_to_rcond, Richard Henderson, 2024/01/10
- [PATCH v3 28/38] tcg/sparc64: Pass TCGCond to tcg_out_cmp, Richard Henderson, 2024/01/10
- [PATCH v3 29/38] tcg/sparc64: Support TCG_COND_TST{EQ,NE}, Richard Henderson, 2024/01/10
- [PATCH v3 30/38] tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc, Richard Henderson, 2024/01/10
- [PATCH v3 33/38] tcg/ppc: Add TCG_CT_CONST_CMP, Richard Henderson, 2024/01/10