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[PATCH 75/88] esp.c: improve ESP_RSEQ logic consolidation
From: |
Mark Cave-Ayland |
Subject: |
[PATCH 75/88] esp.c: improve ESP_RSEQ logic consolidation |
Date: |
Fri, 12 Jan 2024 12:54:07 +0000 |
The ESP_RSEQ logic is scattered in a few places throughout the ESP state machine
which is mainly because the ESP_RSEQ register isn't always reset when executing
an ESP select command. Once this is done, the ESP_RSEQ register only needs to be
updated at the point where the sequencer command completes.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/scsi/esp.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index aa7dec71e3..ca26415d5f 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -230,6 +230,7 @@ static int esp_select(ESPState *s)
target = s->wregs[ESP_WBUSID] & BUSID_DID;
s->ti_size = 0;
+ s->rregs[ESP_RSEQ] = SEQ_0;
if (s->current_req) {
/* Started a new command before the old one finished. Cancel it. */
@@ -241,7 +242,6 @@ static int esp_select(ESPState *s)
/* No such drive */
s->rregs[ESP_RSTAT] = 0;
s->rregs[ESP_RINTR] = INTR_DC;
- s->rregs[ESP_RSEQ] = SEQ_0;
esp_raise_irq(s);
return -1;
}
@@ -250,7 +250,6 @@ static int esp_select(ESPState *s)
* Note that we deliberately don't raise the IRQ here: this will be done
* either in esp_transfer_data() or esp_command_complete()
*/
- s->rregs[ESP_RSEQ] = SEQ_CD;
return 0;
}
@@ -358,7 +357,6 @@ static void handle_s_without_atn(ESPState *s)
}
esp_set_phase(s, STAT_CD);
- s->rregs[ESP_RSEQ] = SEQ_CD;
s->cmdfifo_cdb_offset = 0;
if (s->dma) {
@@ -380,7 +378,6 @@ static void handle_satn_stop(ESPState *s)
}
esp_set_phase(s, STAT_MO);
- s->rregs[ESP_RSEQ] = SEQ_MO;
s->cmdfifo_cdb_offset = 0;
if (s->dma) {
@@ -456,6 +453,7 @@ static void esp_do_dma(ESPState *s)
if (fifo8_num_used(&s->cmdfifo) >= 1) {
/* First byte received, switch to command phase */
esp_set_phase(s, STAT_CD);
+ s->rregs[ESP_RSEQ] = SEQ_CD;
s->cmdfifo_cdb_offset = 1;
if (fifo8_num_used(&s->cmdfifo) > 1) {
@@ -468,11 +466,11 @@ static void esp_do_dma(ESPState *s)
case CMD_SELATNS | CMD_DMA:
if (fifo8_num_used(&s->cmdfifo) == 1) {
/* First byte received, stop in message out phase */
+ s->rregs[ESP_RSEQ] = SEQ_MO;
s->cmdfifo_cdb_offset = 1;
/* Raise command completion interrupt */
s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
- s->rregs[ESP_RSEQ] = SEQ_CD;
esp_raise_irq(s);
}
break;
@@ -482,7 +480,6 @@ static void esp_do_dma(ESPState *s)
if (esp_get_tc(s) == 0) {
esp_set_phase(s, STAT_CD);
s->rregs[ESP_CMD] = 0;
- s->rregs[ESP_RSEQ] = SEQ_CD;
s->rregs[ESP_RINTR] |= INTR_BS;
esp_raise_irq(s);
}
@@ -726,6 +723,7 @@ static void esp_do_nodma(ESPState *s)
if (fifo8_num_used(&s->cmdfifo) >= 1) {
/* First byte received, switch to command phase */
esp_set_phase(s, STAT_CD);
+ s->rregs[ESP_RSEQ] = SEQ_CD;
s->cmdfifo_cdb_offset = 1;
if (fifo8_num_used(&s->cmdfifo) > 1) {
@@ -738,6 +736,7 @@ static void esp_do_nodma(ESPState *s)
case CMD_SELATNS:
if (fifo8_num_used(&s->cmdfifo) >= 1) {
/* First byte received, stop in message out phase */
+ s->rregs[ESP_RSEQ] = SEQ_MO;
s->cmdfifo_cdb_offset = 1;
/* Raise command completion interrupt */
@@ -903,6 +902,7 @@ void esp_command_complete(SCSIRequest *req, size_t resid)
* and function complete interrupt
*/
s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
+ s->rregs[ESP_RSEQ] = SEQ_CD;
break;
case CMD_TI | CMD_DMA:
@@ -948,6 +948,7 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len)
* so raise deferred bus service and function complete interrupt
*/
s->rregs[ESP_RINTR] |= INTR_BS | INTR_FC;
+ s->rregs[ESP_RSEQ] = SEQ_CD;
break;
case CMD_SELATNS | CMD_DMA:
@@ -957,6 +958,7 @@ void esp_transfer_data(SCSIRequest *req, uint32_t len)
* completion interrupt
*/
s->rregs[ESP_RINTR] |= INTR_BS;
+ s->rregs[ESP_RSEQ] = SEQ_MO;
break;
case CMD_TI | CMD_DMA:
--
2.39.2
- [PATCH 56/88] esp.c: remove unused PDMA callback implementation, (continued)
- [PATCH 56/88] esp.c: remove unused PDMA callback implementation, Mark Cave-Ayland, 2024/01/12
- [PATCH 54/88] esp.c: move CMD_ICCS command logic to esp_do_dma(), Mark Cave-Ayland, 2024/01/12
- [PATCH 57/88] esp.c: rename data_in_ready to to data_ready, Mark Cave-Ayland, 2024/01/12
- [PATCH 76/88] esp.c: only transfer non-DMA COMMAND phase data for specific commands, Mark Cave-Ayland, 2024/01/12
- [PATCH 66/88] esp.c: process non-DMA FIFO writes in esp_do_nodma(), Mark Cave-Ayland, 2024/01/12
- [PATCH 74/88] esp.c: handle non-DMA FIFO writes used to terminate DMA commands, Mark Cave-Ayland, 2024/01/12
- [PATCH 81/88] esp.c: remove redundant n variable in PDMA COMMAND phase, Mark Cave-Ayland, 2024/01/12
- [PATCH 72/88] esp.c: handle TC underflow for DMA SCSI requests, Mark Cave-Ayland, 2024/01/12
- [PATCH 64/88] esp.c: don't raise INTR_BS interrupt in DATA IN phase until TI command issued, Mark Cave-Ayland, 2024/01/12
- [PATCH 50/88] esp.c: move CMD_TI end of message phase detection to esp_do_dma() and do_dma_pdma_cb(), Mark Cave-Ayland, 2024/01/12
- [PATCH 75/88] esp.c: improve ESP_RSEQ logic consolidation,
Mark Cave-Ayland <=
- [PATCH 79/88] esp.c: consolidate DMA and PDMA logic in DATA IN phase, Mark Cave-Ayland, 2024/01/12
- [PATCH 71/88] esp.c: don't clear the SCSI phase when reading ESP_RINTR, Mark Cave-Ayland, 2024/01/12
- [PATCH 55/88] esp.c: always use esp_do_dma() in pdma_cb(), Mark Cave-Ayland, 2024/01/12
- [PATCH 70/88] esp.c: ensure that STAT_INT is cleared when reading ESP_RINTR, Mark Cave-Ayland, 2024/01/12
- [PATCH 80/88] esp.c: consolidate DMA and PDMA logic in MESSAGE OUT phase, Mark Cave-Ayland, 2024/01/12
- [PATCH 51/88] esp.c: don't use get_cmd() for CMD_SEL DMA commands, Mark Cave-Ayland, 2024/01/12
- [PATCH 65/88] esp.c: move non-DMA TI logic to separate esp_nodma_ti_dataout() function, Mark Cave-Ayland, 2024/01/12
- [PATCH 78/88] esp.c: consolidate DMA and PDMA logic in DATA OUT phase, Mark Cave-Ayland, 2024/01/12
- [PATCH 59/88] esp.c: separate logic based upon ESP command in esp_transfer_data(), Mark Cave-Ayland, 2024/01/12
- [PATCH 73/88] esp.c: remove restriction on FIFO read access when DMA memory routines defined, Mark Cave-Ayland, 2024/01/12