Re: chacha20-s390 broken in 8.2.0 in TCG on s390x

[Alex Bennée]

Michael Tokarev <mjt@tls.msk.ru> writes:

> 04.01.2024 01:51, Richard Henderson :
>> On 1/4/24 01:37, Philippe Mathieu-Daudé wrote:
>>> Finally changing the constraints on op_rotli_vec seems to fix it:
>>>
>>> ---
>>> diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
>>> index fbee43d3b0..b3456fe857 100644
>>> --- a/tcg/s390x/tcg-target.c.inc
>>> +++ b/tcg/s390x/tcg-target.c.inc
>>> @@ -3264,13 +3264,13 @@ static TCGConstraintSetIndex 
>>> tcg_target_op_def(TCGOpcode op)
>>>       case INDEX_op_ld_vec:
>>>       case INDEX_op_dupm_vec:
>>> +    case INDEX_op_rotli_vec:
>>>           return C_O1_I1(v, r);
>>>       case INDEX_op_dup_vec:
>>>           return C_O1_I1(v, vr);
>>>       case INDEX_op_abs_vec:
>>>       case INDEX_op_neg_vec:
>>>       case INDEX_op_not_vec:
>>> -    case INDEX_op_rotli_vec:
>>>       case INDEX_op_sari_vec:
>>>       case INDEX_op_shli_vec:
>>>       case INDEX_op_shri_vec:
>>>       case INDEX_op_s390_vuph_vec:
>>>       case INDEX_op_s390_vupl_vec:
>>>           return C_O1_I1(v, v);
>> Definitely not correct, since VERLL requires a vector input to be
>> rotated.
>> 
>>> But I'm outside of my comfort zone so not really sure what I'm doing...
>>> (I was inspired by the "the instruction verll only allows immediates up
>>> to 32 bits." comment from
>>> https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg317099.html)
>> That message is confused.  The immediate in VERLL is 12 bits (with
>> only 6 bits ever used for MO_64).  Dunno where "32 bits" comes from.
>
> So, what do we have here in the end?
> Should we fix this on qemu side?

I think the thinking is we should disable the optimisation for the 8.2
stable while figuring out the true fix for 9.0.

>
> This thread stopped quite some time ago, with problematic
> instruction found but no solution..
>
> Thanks,
>
> /mjt

-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro