The low bit of MMU indices for x86 TCG indicates whether the processor is
in 32-bit mode and therefore linear addresses have to be masked to 32 bits.
However, the index was computed incorrectly, leading to possible conflicts
in the TLB for any address above 4G.
Analyzed-by: Mark Cave-Ayland<mark.cave-ayland@ilande.co.uk>
Fixes: b1661801c18 ("target/i386: Fix physical address truncation", 2024-02-28)
Cc:qemu-stable@nongnu.org
Resolves:https://gitlab.com/qemu-project/qemu/-/issues/2206
Signed-off-by: Paolo Bonzini<pbonzini@redhat.com>
---
target/i386/cpu.h | 2 +-
target/i386/cpu.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)