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Re: [Qemu-ppc] [PATCH for-1.1 3/3] tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 mo
From: |
Alexander Graf |
Subject: |
Re: [Qemu-ppc] [PATCH for-1.1 3/3] tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 mode |
Date: |
Tue, 8 May 2012 19:39:56 +0200 |
On 07.05.2012, at 01:46, Andreas Färber wrote:
> Adjust the tcg_out_qemu_{ld,st}() slow paths to pass AREG0 in r3.
> Automate the register numbering to avoid double-coding the two modes,
> and introduce TCG_TARGET_CALL_ALIGN_I64_ARG() macro to align for SVR4
> but not for Darwin ABI.
>
> Based on patch by malc.
AREG0-free PPC works for me with this patch on a ppc32 host.
Tested-by: Alexander Graf <address@hidden>
Alex
Re: [Qemu-ppc] [PATCH for-1.1 0/3] tcg/ppc: AREG0 support and Darwin fixes, Alexander Graf, 2012/05/08