[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] Qemu pSeries AIX ADB boot
From: |
Thomas Huth |
Subject: |
Re: [Qemu-ppc] Qemu pSeries AIX ADB boot |
Date: |
Tue, 12 Jun 2012 13:13:31 +0200 |
Am Mon, 11 Jun 2012 14:12:32 -0500
schrieb Michael Sabino <address@hidden>:
> Actually, the POWER7 code seems to get further than the 970 in this case
> with the exception handling code disabled.
>
> As far as the code with the exception handling code enabled -
> I added the spr's, but an invalid program exception seems to be being
> generated which doesn't relate to the writing/reading invalid SPR. I'm not
> sure what it's origin is quite yet. Any ideas for figuring this out?
I just attached a GDB and ran a boot until $pc < 0x1000 (to catch the
exceptions), and it seems to me like this is the culprit:
0x5814a4: stxvd2x vs0,r9,r1
That's a new instruction, introduced in PowerISA 2.06, and I guess QEMU
does not emulate it yet and thus generates that invalid program
exception.
Thomas
- [Qemu-ppc] Qemu pSeries AIX ADB boot, Michael Sabino, 2012/06/10
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Thomas Huth, 2012/06/11
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Michael Sabino, 2012/06/11
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Alexander Graf, 2012/06/11
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Michael Sabino, 2012/06/11
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Alexander Graf, 2012/06/12
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Thomas Huth, 2012/06/12
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Alexander Graf, 2012/06/12
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot,
Thomas Huth <=
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Michael Sabino, 2012/06/12
- Re: [Qemu-ppc] Qemu pSeries AIX ADB boot, Michael Sabino, 2012/06/13