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[Qemu-ppc] [PATCH 09/19] openpic: unify memory api subregions
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 09/19] openpic: unify memory api subregions |
Date: |
Sat, 8 Dec 2012 14:44:32 +0100 |
The only difference between the "openpic" and "mpic" memory api subregion
descriptors is the endianness. Unify them as openpic accessors with explicit
endianness markers in their names.
Signed-off-by: Alexander Graf <address@hidden>
---
hw/openpic.c | 108 ++++++++++++++++++++++++++++++----------------------------
1 files changed, 56 insertions(+), 52 deletions(-)
diff --git a/hw/openpic.c b/hw/openpic.c
index 6a852ed..e4ef23d 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -866,7 +866,7 @@ static uint64_t openpic_cpu_read(void *opaque, hwaddr addr,
unsigned len)
return openpic_cpu_read_internal(opaque, addr, (addr & 0x1f000) >> 12);
}
-static const MemoryRegionOps openpic_glb_ops = {
+static const MemoryRegionOps openpic_glb_ops_le = {
.write = openpic_gbl_write,
.read = openpic_gbl_read,
.endianness = DEVICE_LITTLE_ENDIAN,
@@ -876,7 +876,17 @@ static const MemoryRegionOps openpic_glb_ops = {
},
};
-static const MemoryRegionOps openpic_tmr_ops = {
+static const MemoryRegionOps openpic_glb_ops_be = {
+ .write = openpic_gbl_write,
+ .read = openpic_gbl_read,
+ .endianness = DEVICE_BIG_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+};
+
+static const MemoryRegionOps openpic_tmr_ops_le = {
.write = openpic_timer_write,
.read = openpic_timer_read,
.endianness = DEVICE_LITTLE_ENDIAN,
@@ -886,7 +896,17 @@ static const MemoryRegionOps openpic_tmr_ops = {
},
};
-static const MemoryRegionOps openpic_cpu_ops = {
+static const MemoryRegionOps openpic_tmr_ops_be = {
+ .write = openpic_timer_write,
+ .read = openpic_timer_read,
+ .endianness = DEVICE_BIG_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+};
+
+static const MemoryRegionOps openpic_cpu_ops_le = {
.write = openpic_cpu_write,
.read = openpic_cpu_read,
.endianness = DEVICE_LITTLE_ENDIAN,
@@ -896,7 +916,17 @@ static const MemoryRegionOps openpic_cpu_ops = {
},
};
-static const MemoryRegionOps openpic_src_ops = {
+static const MemoryRegionOps openpic_cpu_ops_be = {
+ .write = openpic_cpu_write,
+ .read = openpic_cpu_read,
+ .endianness = DEVICE_BIG_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+};
+
+static const MemoryRegionOps openpic_src_ops_le = {
.write = openpic_src_write,
.read = openpic_src_read,
.endianness = DEVICE_LITTLE_ENDIAN,
@@ -906,6 +936,16 @@ static const MemoryRegionOps openpic_src_ops = {
},
};
+static const MemoryRegionOps openpic_src_ops_be = {
+ .write = openpic_src_write,
+ .read = openpic_src_read,
+ .endianness = DEVICE_BIG_ENDIAN,
+ .impl = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+};
+
static void openpic_save_IRQ_queue(QEMUFile* f, IRQ_queue_t *q)
{
unsigned int i;
@@ -1025,10 +1065,14 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int
nb_cpus,
hwaddr start_addr;
ram_addr_t size;
} const list[] = {
- {"glb", &openpic_glb_ops, OPENPIC_GLB_REG_START, OPENPIC_GLB_REG_SIZE},
- {"tmr", &openpic_tmr_ops, OPENPIC_TMR_REG_START, OPENPIC_TMR_REG_SIZE},
- {"src", &openpic_src_ops, OPENPIC_SRC_REG_START, OPENPIC_SRC_REG_SIZE},
- {"cpu", &openpic_cpu_ops, OPENPIC_CPU_REG_START, OPENPIC_CPU_REG_SIZE},
+ {"glb", &openpic_glb_ops_le, OPENPIC_GLB_REG_START,
+ OPENPIC_GLB_REG_SIZE},
+ {"tmr", &openpic_tmr_ops_le, OPENPIC_TMR_REG_START,
+ OPENPIC_TMR_REG_SIZE},
+ {"src", &openpic_src_ops_le, OPENPIC_SRC_REG_START,
+ OPENPIC_SRC_REG_SIZE},
+ {"cpu", &openpic_cpu_ops_le, OPENPIC_CPU_REG_START,
+ OPENPIC_CPU_REG_SIZE},
};
/* XXX: for now, only one CPU is supported */
@@ -1085,46 +1129,6 @@ qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus,
return qemu_allocate_irqs(openpic_set_irq, opp, opp->max_irq);
}
-static const MemoryRegionOps mpic_glb_ops = {
- .write = openpic_gbl_write,
- .read = openpic_gbl_read,
- .endianness = DEVICE_BIG_ENDIAN,
- .impl = {
- .min_access_size = 4,
- .max_access_size = 4,
- },
-};
-
-static const MemoryRegionOps mpic_tmr_ops = {
- .write = openpic_timer_write,
- .read = openpic_timer_read,
- .endianness = DEVICE_BIG_ENDIAN,
- .impl = {
- .min_access_size = 4,
- .max_access_size = 4,
- },
-};
-
-static const MemoryRegionOps mpic_cpu_ops = {
- .write = openpic_cpu_write,
- .read = openpic_cpu_read,
- .endianness = DEVICE_BIG_ENDIAN,
- .impl = {
- .min_access_size = 4,
- .max_access_size = 4,
- },
-};
-
-static const MemoryRegionOps mpic_irq_ops = {
- .write = openpic_src_write,
- .read = openpic_src_read,
- .endianness = DEVICE_BIG_ENDIAN,
- .impl = {
- .min_access_size = 4,
- .max_access_size = 4,
- },
-};
-
qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base,
int nb_cpus, qemu_irq **irqs, qemu_irq irq_out)
{
@@ -1136,10 +1140,10 @@ qemu_irq *mpic_init (MemoryRegion *address_space,
hwaddr base,
hwaddr start_addr;
ram_addr_t size;
} const list[] = {
- {"glb", &mpic_glb_ops, MPIC_GLB_REG_START, MPIC_GLB_REG_SIZE},
- {"tmr", &mpic_tmr_ops, MPIC_TMR_REG_START, MPIC_TMR_REG_SIZE},
- {"src", &mpic_irq_ops, MPIC_SRC_REG_START, MPIC_SRC_REG_SIZE},
- {"cpu", &mpic_cpu_ops, MPIC_CPU_REG_START, MPIC_CPU_REG_SIZE},
+ {"glb", &openpic_glb_ops_be, MPIC_GLB_REG_START, MPIC_GLB_REG_SIZE},
+ {"tmr", &openpic_tmr_ops_be, MPIC_TMR_REG_START, MPIC_TMR_REG_SIZE},
+ {"src", &openpic_src_ops_be, MPIC_SRC_REG_START, MPIC_SRC_REG_SIZE},
+ {"cpu", &openpic_cpu_ops_be, MPIC_CPU_REG_START, MPIC_CPU_REG_SIZE},
};
mpp = g_malloc0(sizeof(openpic_t));
--
1.6.0.2
- [Qemu-ppc] [PATCH 00/19] OpenPIC refactoring and MSI support, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 15/19] openpic: make brr1 model specific, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 10/19] openpic: remove unused type variable, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 03/19] openpic: update to proper memory api, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 04/19] openpic: combine mpic and openpic src handlers, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 12/19] openpic: rename openpic_t to OpenPICState, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 18/19] PPC: e500: Declare pci bridge as bridge, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 09/19] openpic: unify memory api subregions,
Alexander Graf <=
- [Qemu-ppc] [PATCH 19/19] MSI-X: Fix endianness, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 08/19] openpic: combine openpic and mpic reset functions, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 13/19] openpic: remove irq_out, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 05/19] openpic: Convert subregions to memory api, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 17/19] PPC: e500: Add MSI support, Alexander Graf, 2012/12/08
- [Qemu-ppc] [PATCH 01/19] openpic: Remove unused code, Alexander Graf, 2012/12/08