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[Qemu-ppc] [PATCH 06/31] openpic: don't crash on a register access witho
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 06/31] openpic: don't crash on a register access without a CPU context |
Date: |
Mon, 7 Jan 2013 16:38:35 +0100 |
From: Scott Wood <address@hidden>
If we access a register via the QEMU memory inspection commands (e.g.
"xp") rather than from guest code, we won't have a CPU context.
Gracefully fail to access the register in that case, rather than
crashing.
Signed-off-by: Scott Wood <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
hw/openpic.c | 16 +++++++++++++++-
1 files changed, 15 insertions(+), 1 deletions(-)
diff --git a/hw/openpic.c b/hw/openpic.c
index 10dbdf7..93e8208 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -161,7 +161,11 @@ static inline int test_bit(uint32_t *field, int bit)
static int get_current_cpu(void)
{
- return cpu_single_env->cpu_index;
+ if (!cpu_single_env) {
+ return -1;
+ }
+
+ return cpu_single_env->cpu_index;
}
static uint32_t openpic_cpu_read_internal(void *opaque, hwaddr addr,
@@ -810,6 +814,11 @@ static void openpic_cpu_write_internal(void *opaque,
hwaddr addr,
DPRINTF("%s: cpu %d addr " TARGET_FMT_plx " <= %08x\n", __func__, idx,
addr, val);
+
+ if (idx < 0) {
+ return;
+ }
+
if (addr & 0xF)
return;
dst = &opp->dst[idx];
@@ -875,6 +884,11 @@ static uint32_t openpic_cpu_read_internal(void *opaque,
hwaddr addr,
DPRINTF("%s: cpu %d addr " TARGET_FMT_plx "\n", __func__, idx, addr);
retval = 0xFFFFFFFF;
+
+ if (idx < 0) {
+ return retval;
+ }
+
if (addr & 0xF)
return retval;
dst = &opp->dst[idx];
--
1.6.0.2
- [Qemu-ppc] [PULL 00/31] ppc patch queue 2013-01-07, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 05/31] openpic: s/opp->nb_irqs -1/opp->nb_cpus - 1/, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 02/31] openpic: remove pcsr (CPU sensitivity register), Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 06/31] openpic: don't crash on a register access without a CPU context,
Alexander Graf <=
- [Qemu-ppc] [PATCH 04/31] openpic: BRR1 is not a CPU-specific register., Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 10/31] PPC: fix segfault in signal handling code, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 07/31] powerpc: linux header sync script includes epapr_hcalls.h, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 03/31] openpic: support large vectors on FSL mpic, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 08/31] openpic: fix coding style issues, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 18/31] openpic: always call IRQ_check from IRQ_get_next, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 19/31] Revert "openpic: Accelerate pending irq search", Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 23/31] openpic: IRQ_check: search the queue a word at a time, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 21/31] openpic: add some bounds checking for IRQ numbers, Alexander Graf, 2013/01/07
- [Qemu-ppc] [PATCH 29/31] target-ppc: Slim conversion of model definitions to QOM subclasses, Alexander Graf, 2013/01/07