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[Qemu-ppc] [PATCH 23/30] target-ppc: add instruction flags for Book I 2.
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 23/30] target-ppc: add instruction flags for Book I 2.05 |
Date: |
Fri, 26 Apr 2013 20:21:42 +0200 |
From: Aurelien Jarno <address@hidden>
.. and enable it on POWER7 CPU.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/cpu.h | 4 +++-
target-ppc/translate_init.c | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index b8b09b9..7cacb56 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1870,8 +1870,10 @@ enum {
PPC2_PRCNTL = 0x0000000000000008ULL,
/* Byte-reversed, indexed, double-word load and store */
PPC2_DBRX = 0x0000000000000010ULL,
+ /* Book I 2.05 PowerPC specification */
+ PPC2_ISA205 = 0x0000000000000020ULL,
-#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_DBRX)
+#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_DBRX | PPC2_ISA205)
};
/*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index b0e3536..6feb62a 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7042,7 +7042,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
PPC_64B | PPC_ALTIVEC |
PPC_SEGMENT_64B | PPC_SLBI |
PPC_POPCNTB | PPC_POPCNTWD;
- pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX;
+ pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205;
pcc->msr_mask = 0x800000000204FF36ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
--
1.6.0.2
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 05/30] PPC: fix hreset_vector for 60x, 7x0, 7x5, G2, MPC8xx, MPC5xx, 7400 and 7450, (continued)
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 05/30] PPC: fix hreset_vector for 60x, 7x0, 7x5, G2, MPC8xx, MPC5xx, 7400 and 7450, Aurelien Jarno, 2013/04/29
- [Qemu-ppc] [PATCH] Fix PReP NIP reset value, Fabien Chouteau, 2013/04/30
- Re: [Qemu-ppc] [PATCH] Fix PReP NIP reset value, Alexander Graf, 2013/04/30
- Re: [Qemu-ppc] [Qemu-devel] [PATCH] Fix PReP NIP reset value, Fabien Chouteau, 2013/04/30
- Re: [Qemu-ppc] [Qemu-devel] [PATCH] Fix PReP NIP reset value, Alexander Graf, 2013/04/30
- Re: [Qemu-ppc] [Qemu-devel] [PATCH] Fix PReP NIP reset value, Fabien Chouteau, 2013/04/30
- Re: [Qemu-ppc] [Qemu-devel] [PATCH] Fix PReP NIP reset value, Alexander Graf, 2013/04/30
- Re: [Qemu-ppc] [Qemu-devel] [PATCH] Fix PReP NIP reset value, Hervé Poussineau, 2013/04/30
[Qemu-ppc] [PATCH 20/30] PPC: Fix dcbz for linux-user on 970, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 22/30] disas: Disassemble all ppc insns for the guest, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 23/30] target-ppc: add instruction flags for Book I 2.05,
Alexander Graf <=
[Qemu-ppc] [PATCH 29/30] target-ppc: emulate store doubleword pair instructions, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 24/30] target-ppc: emulate cmpb instruction, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 28/30] target-ppc: emulate load doubleword pair instructions, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 26/30] target-ppc: emulate fcpsgn instruction, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 25/30] target-ppc: emulate prtyw and prtyd instructions, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 21/30] target-ppc: optimize fabs, fnabs, fneg, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 19/30] powerpc: correctly handle fpu exceptions., Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 27/30] target-ppc: emulate lfiwax instruction, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 15/30] pseries: Fix some small errors in XICS logic, Alexander Graf, 2013/04/26
[Qemu-ppc] [PATCH 14/30] target-ppc: Add more stubs for POWER7 PMU registers, Alexander Graf, 2013/04/26