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[Qemu-ppc] [V4 PATCH 10/22] target-ppc: Add Flag for ISA V2.06 Floating
From: |
Tom Musta |
Subject: |
[Qemu-ppc] [V4 PATCH 10/22] target-ppc: Add Flag for ISA V2.06 Floating Point Conversion |
Date: |
Tue, 7 Jan 2014 10:05:58 -0600 |
This patch adds a flag for the floating point conversion instructions
introduced in Power ISA 2.06B.
Signed-off-by: Tom Musta <address@hidden>
---
V4: Split single flag into multiple flags per discussion with
Alex Graf and Scott Wood. Added to Power7+ config.
target-ppc/cpu.h | 5 ++++-
target-ppc/translate_init.c | 6 +++---
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 3057ac8..4a68ce2 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1883,11 +1883,14 @@ enum {
PPC2_DIVE_ISA206 = 0x0000000000000100ULL,
/* ISA 2.06B larx/stcx. instructions */
PPC2_ATOMIC_ISA206 = 0x0000000000000200ULL,
+ /* ISA 2.06B floating point integer conversion */
+ PPC2_FP_CVT_ISA206 = 0x0000000000000400ULL,
#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
- PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206)
+ PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \
+ PPC2_FP_CVT_ISA206)
};
/*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 5778760..3fb849b 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7238,7 +7238,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
PPC_POPCNTB | PPC_POPCNTWD;
pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
- PPC2_ATOMIC_ISA206;
+ PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206;
pcc->msr_mask = 0x800000000284FF37ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
@@ -7278,7 +7278,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data)
PPC_POPCNTB | PPC_POPCNTWD;
pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
- PPC2_ATOMIC_ISA206;
+ PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206;
pcc->msr_mask = 0x800000000204FF37ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
@@ -7318,7 +7318,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
PPC_POPCNTB | PPC_POPCNTWD;
pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX |
PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
- PPC2_ATOMIC_ISA206;
+ PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206;
pcc->msr_mask = 0x800000000284FF36ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
--
1.7.1
- [Qemu-ppc] [V4 PATCH 05/22] target-ppc: Add ISA 2.06 divweu[o] Instructions, (continued)
- [Qemu-ppc] [V4 PATCH 05/22] target-ppc: Add ISA 2.06 divweu[o] Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 04/22] target-ppc: Add ISA2.06 divde[o] Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 06/22] target-ppc: Add ISA 2.06 divwe[o] Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 13/22] softfloat: Fix exception flag handling for float32_to_float16(), Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 07/22] target-ppc: Add Flag for ISA2.06 Atomic Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 08/22] target-ppc: Add ISA2.06 lbarx, lharx Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 14/22] softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 10/22] target-ppc: Add Flag for ISA V2.06 Floating Point Conversion,
Tom Musta <=
- [Qemu-ppc] [V4 PATCH 15/22] softfloat: Refactor code handling various rounding modes, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 11/22] target-ppc: Add ISA2.06 Float to Integer Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 09/22] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 12/22] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 16/22] softfloat: Add support for ties-away rounding, Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 17/22] target-ppc: Fix and enable fri[mnpz], Tom Musta, 2014/01/07
- [Qemu-ppc] [V4 PATCH 18/22] target-ppc: Add Flag for Power ISA V2.06 Floating Point Test Instructions, Tom Musta, 2014/01/07