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Re: [Qemu-ppc] [PATCH 2/2] ppc: tcg: implement helper_nap
From: |
Tom Musta |
Subject: |
Re: [Qemu-ppc] [PATCH 2/2] ppc: tcg: implement helper_nap |
Date: |
Wed, 15 Jan 2014 08:20:40 -0600 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 |
On 1/14/2014 8:22 PM, Liu Ping Fan wrote:
> When nap, clear no persistent register as ISA spec says.
>
> Signed-off-by: Liu Ping Fan <address@hidden>
> ---
> target-ppc/excp_helper.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
> index a9712bc..5dbb166 100644
> --- a/target-ppc/excp_helper.c
> +++ b/target-ppc/excp_helper.c
> @@ -892,6 +892,20 @@ void helper_hrfid(CPUPPCState *env)
>
> void helper_nap(CPUPPCState *env)
> {
> + int i;
> + for (i = 0; i < 32; i++) {
> + env->gpr[i] = 0;
> + }
> + env->lr = 0;
> + env->ctr = 0;
> + for (i = 0; i < 8; i++) {
> + env->crf[i] = 0;
> + }
> + env->msr = 0;
> + for (i = 0; i < 32; i++) {
> + env->fpr[i] = 0;
> + }
> +
> }
> #endif
>
>
The Power Saving Mode instructions (doze, nap, sleep, rvwinkle) all put the
hardware thread into a suspended state, including the halting of subsequent
instruction fetches. I don't see how your patch achieves this; I suspect
that QEMU will attempt to fetch whatever instruction immediately follows
nap in the new context (MSR=0). Can you elaborate?
Also, if you are going to add nap, why not also add doze, sleep and rvwinkle?