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Re: [Qemu-ppc] [PATCH 00/28] target-ppc: Altivec 2.07
From: |
Alexander Graf |
Subject: |
Re: [Qemu-ppc] [PATCH 00/28] target-ppc: Altivec 2.07 |
Date: |
Thu, 20 Feb 2014 16:00:55 +0100 |
On 12.02.2014, at 22:22, Tom Musta <address@hidden> wrote:
> This patch series implements the changes to Altivec introduced by Power ISA
> Version 2.07.
Thanks, applied to ppc-next. You might want to work with Peter and friends on
Risu for PPC to verify that everything you're implementing here actually
matches what real hardware does :).
Alex
>
> Tom Musta (28):
> target-ppc: Altivec 2.07: Add Instruction Flag
> target-ppc: Altivec 2.07: Update AVR Structure
> target-ppc: Altivec 2.07: Add GEN_VXFORM3
> target-ppc: Altivec 2.07: Add Support for Dual Altivec Instructions
> target-ppc: Altivec 2.07: Add Opcode Macro for VX Form Instructions
> target-ppc: Altivec 2.07: Add Support for R-Form Dual Instructions
> target-ppc: Altivec 2.07: Vector Logical Instructions
> target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo
> target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit Integers
> target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions
> target-ppc: Altivec 2.07: vmuluw Instruction
> target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes
> target-ppc: Altivec 2.07: Vector Population Count Instructions
> target-ppc: Altivec 2.07: Vector Min/Max Doubleword Instructions
> target-ppc: Altivec 2.07: Pack Doubleword Instructions
> target-ppc: Altivec 2.07: Unpack Signed Word Instructions
> target-ppc: Altivec 2.07: Vector Merge Instructions
> target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates
> and Shifts
> target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift
> Instructions
> target-ppc: Altivec 2.07: Quadword Addition and Subtracation
> target-ppc: Altivec 2.07: vbpermq Instruction
> target-ppc: Altivec 2.07: Doubleword Compares
> target-ppc: Altivec 2.07: Vector Gather Bits by Bytes
> target-ppc: Altivec 2.07: Vector Polynomial Multiply Sum
> target-ppc: Altivec 2.07: Binary Coded Decimal Instructions
> target-ppc: Altivec 2.07: AES Instructions
> target-ppc: Altivec 2.07: Vector SHA Sigma Instructions
> target-ppc: Altivec 2.07: Vector Permute and Exclusive OR
>
> target-ppc/cpu.h | 9 +-
> target-ppc/helper.h | 62 +++
> target-ppc/int_helper.c | 1278 +++++++++++++++++++++++++++++++++++++++++--
> target-ppc/translate.c | 348 ++++++++++++-
> target-ppc/translate_init.c | 2 +-
> 5 files changed, 1648 insertions(+), 51 deletions(-)
>
>
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, (continued)
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Richard W.M. Jones, 2014/02/20
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Aneesh Kumar K.V, 2014/02/21
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Avik Sil, 2014/02/21
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Alexander Graf, 2014/02/21
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Peter Maydell, 2014/02/21
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Alexander Graf, 2014/02/21
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Peter Maydell, 2014/02/21
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Thomas Huth, 2014/02/20
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Richard W.M. Jones, 2014/02/20
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/28] target-ppc: Altivec 2.07, Nikunj A Dadhania, 2014/02/24
Re: [Qemu-ppc] [PATCH 00/28] target-ppc: Altivec 2.07,
Alexander Graf <=