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Re: [Qemu-ppc] [PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) e
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation |
Date: |
Thu, 19 Nov 2015 17:26:41 +1100 |
User-agent: |
Mutt/1.5.23 (2015-06-09) |
On Wed, Nov 11, 2015 at 11:27:28AM +1100, Benjamin Herrenschmidt wrote:
> From: Michael Neuling <address@hidden>
>
> Signed-off-by: Michael Neuling <address@hidden>
> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Looks correct, though my memory of C promotion rules is obviously a
bit stale, since I'm not immediately seeing why the original was wrong.
> ---
> target-ppc/translate.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index bd5df40..3974cd2 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -4391,7 +4391,7 @@ static void gen_mtmsrd(DisasContext *ctx)
> /* Special form that does not need any synchronisation */
> TCGv t0 = tcg_temp_new();
> tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], (1 << MSR_RI) | (1 <<
> MSR_EE));
> - tcg_gen_andi_tl(cpu_msr, cpu_msr, ~((1 << MSR_RI) | (1 << MSR_EE)));
> + tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(target_ulong)((1 << MSR_RI) | (1
> << MSR_EE)));
> tcg_gen_or_tl(cpu_msr, cpu_msr, t0);
> tcg_temp_free(t0);
> } else {
> @@ -4422,7 +4422,7 @@ static void gen_mtmsr(DisasContext *ctx)
> /* Special form that does not need any synchronisation */
> TCGv t0 = tcg_temp_new();
> tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], (1 << MSR_RI) | (1 <<
> MSR_EE));
> - tcg_gen_andi_tl(cpu_msr, cpu_msr, ~((1 << MSR_RI) | (1 << MSR_EE)));
> + tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(target_ulong)((1 << MSR_RI) | (1
> << MSR_EE)));
> tcg_gen_or_tl(cpu_msr, cpu_msr, t0);
> tcg_temp_free(t0);
> } else {
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, (continued)
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, Alexey Kardashevskiy, 2015/11/10
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, Benjamin Herrenschmidt, 2015/11/10
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, Alexey Kardashevskiy, 2015/11/10
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, Benjamin Herrenschmidt, 2015/11/10
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, Alexey Kardashevskiy, 2015/11/10
- Re: [Qemu-ppc] [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform, Benjamin Herrenschmidt, 2015/11/10
Re: [Qemu-ppc] [PATCH 00/77] ppc: Add "native" POWER8 platform, Stewart Smith, 2015/11/10
[Qemu-ppc] [PATCH 10/77] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV, Benjamin Herrenschmidt, 2015/11/10
[Qemu-ppc] [PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation, Benjamin Herrenschmidt, 2015/11/10
- Re: [Qemu-ppc] [PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation,
David Gibson <=
[Qemu-ppc] [PATCH 22/77] ppc: Add real mode CI load/store instructions for P7 and P8, Benjamin Herrenschmidt, 2015/11/10
[Qemu-ppc] [PATCH 37/77] ppc/xics: Split ICS into base class and "simple" implementation, Benjamin Herrenschmidt, 2015/11/10
[Qemu-ppc] [PATCH 24/77] ppc: Move exception generation code out of line, Benjamin Herrenschmidt, 2015/11/10
[Qemu-ppc] [PATCH 16/77] ppc: Get out of emulation on SMT "OR" ops, Benjamin Herrenschmidt, 2015/11/10