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Re: [Qemu-ppc] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model |
Date: |
Tue, 5 Apr 2016 13:25:33 +1000 |
User-agent: |
Mutt/1.5.24 (2015-08-30) |
On Tue, Apr 05, 2016 at 12:19:50PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2016-04-05 at 12:17 +1000, David Gibson wrote:
> > From: Cédric Le Goater <address@hidden>
> >
> > From: Benjamin Herrenschmidt <address@hidden>
> >
> > This patch fixes the current AIL implementation for POWER8. The
> > interrupt vector address can be calculated directly from LPCR when
> > the
> > exception is handled. The excp_prefix update becomes useless and we
> > can cleanup the H_SET_MODE hcall.
>
> Beware, iirc, this depends on the new cpu_set_papr() stuff I did so we
> get the right LPCR values in PAPR mode.
Right, Cédric already submitted that before the 2.6 freeze, and it was
merged as 26a7f129, AFAICT.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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[Qemu-ppc] [PULL 2/3] spapr_drc: enable immediate detach for unsignalled devices, David Gibson, 2016/04/04
[Qemu-ppc] [PULL 3/3] vl: Move cpu_synchronize_all_states() into qemu_system_reset(), David Gibson, 2016/04/04