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Re: [Qemu-ppc] [PATCH v2] ppc: Fix support for odd MSR combinations
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v2] ppc: Fix support for odd MSR combinations |
Date: |
Tue, 12 Jul 2016 10:57:17 +1000 |
User-agent: |
Mutt/1.6.1 (2016-04-27) |
On Mon, Jul 11, 2016 at 07:30:08PM +0100, Mark Cave-Ayland wrote:
1;4402;0c> On 11/07/16 02:55, David Gibson wrote:
>
> > On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote:
> >> MacOS uses an architecturally illegal MSR combination that
> >> seems nonetheless supported by 32-bit processors, which is
> >> to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0.
> >>
> >> This adds support for it. To work properly we need to also
> >> properly include support for PR=1,{I,D}R=0 to the MMU index
> >> used by the qemu TLB.
> >>
> >> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> >
> > Applied to ppc-for-2.7, thanks.
>
> Hi David,
>
> I can't see this in the ppc-for-2.7 branch on github - does it need
> a push?
Yes it did. Done now.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, (continued)
- Re: [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/08
- [Qemu-ppc] [PATCH] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-ppc] [PATCH] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- [Qemu-ppc] [PATCH v2] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-ppc] [PATCH v2] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations, Mark Cave-Ayland, 2016/07/09
- Re: [Qemu-ppc] [PATCH v2] ppc: Fix support for odd MSR combinations, David Gibson, 2016/07/10
- Re: [Qemu-ppc] [PATCH v2] ppc: Fix support for odd MSR combinations, Mark Cave-Ayland, 2016/07/11
- Re: [Qemu-ppc] [PATCH v2] ppc: Fix support for odd MSR combinations,
David Gibson <=
- Re: [Qemu-ppc] [Qemu-devel] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Mark Cave-Ayland, 2016/07/09
- Re: [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Cédric Le Goater, 2016/07/09
- Re: [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/09
- Re: [Qemu-ppc] [Qemu-devel] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Cédric Le Goater, 2016/07/09
[Qemu-ppc] [PULL 03/23] ppc: Use a helper to filter writes to LPCR, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 02/23] ppc: Update LPCR definitions, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 21/23] spapr: do proper error propagation in spapr_cpu_core_realize_child(), David Gibson, 2016/07/01
[Qemu-ppc] [PULL 19/23] spapr: Restore support for 970MP and POWER8NVL CPU cores, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 12/23] target-ppc: Eliminate redundant and incorrect function booke206_page_size_to_tlb, David Gibson, 2016/07/01
[Qemu-ppc] [PULL 01/23] ppc: Add a bunch of hypervisor SPRs to Book3s, David Gibson, 2016/07/01