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From: | Richard Henderson |
Subject: | Re: [Qemu-ppc] [Qemu-devel] [RFC v1 10/13] target-ppc: add setb instruction |
Date: | Thu, 21 Jul 2016 12:19:33 +0530 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1 |
On 07/18/2016 10:35 PM, Nikunj A Dadhania wrote:
+ tcg_gen_andi_i32(t0, cpu_crf[crf], 0x3); + tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1); + tcg_gen_andi_i32(t0, cpu_crf[crf], 0x1); + tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 1, l2); + tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], 1); + tcg_gen_br(out); + gen_set_label(l2); + tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], -1); + tcg_gen_br(out); + gen_set_label(l1); + tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], 0); + gen_set_label(out);
Without branches: tcg_gen_setcondi_i32(TCG_COND_GEU, t0, cpu_crf[crf], 4); tcg_gen_movi_i32(t8, 8); tcg_gen_movi_i32(tm1, -1); tcg_gen_movcond_i32(TCG_COND_GEU, t0, cpu_crf[crf], t8, tm1, t0); tcg_gen_ext_i32_tl(cpu_gpr[rD(ctx->opcode)], t0); r~
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