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[Qemu-ppc] [PULL 07/19] ppc: Remove some stub POWER6 models
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 07/19] ppc: Remove some stub POWER6 models |
Date: |
Tue, 15 Nov 2016 13:48:52 +1100 |
The CPU model table includes stub (commented out) definitions for
CPU_POWERPC_POWER6_5 and CPU_POWERPC_POWER6A. These are not real cpu
models, but represent the POWER6 in some compatiblity modes. If we ever
do implement POWER6 (unlikely), we'll implement its compatibility modes in
a different way (similar to what we do for POWER7 and POWER8). So these
stub definitions can be removed.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
---
target-ppc/cpu-models.c | 4 ----
target-ppc/cpu-models.h | 2 --
2 files changed, 6 deletions(-)
diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c
index 901cf40..506dee1 100644
--- a/target-ppc/cpu-models.c
+++ b/target-ppc/cpu-models.c
@@ -1130,10 +1130,6 @@
#if defined(TODO)
POWERPC_DEF("POWER6", CPU_POWERPC_POWER6, POWER6,
"POWER6")
- POWERPC_DEF("POWER6_5", CPU_POWERPC_POWER6_5, POWER5,
- "POWER6 running in POWER5 mode")
- POWERPC_DEF("POWER6A", CPU_POWERPC_POWER6A, POWER6,
- "POWER6A")
#endif
POWERPC_DEF("POWER7_v2.3", CPU_POWERPC_POWER7_v23, POWER7,
"POWER7 v2.3")
diff --git a/target-ppc/cpu-models.h b/target-ppc/cpu-models.h
index 7d9e6a2..aafbbd7 100644
--- a/target-ppc/cpu-models.h
+++ b/target-ppc/cpu-models.h
@@ -549,8 +549,6 @@ enum {
CPU_POWERPC_POWER5 = 0x003A0203,
CPU_POWERPC_POWER5P_v21 = 0x003B0201,
CPU_POWERPC_POWER6 = 0x003E0000,
- CPU_POWERPC_POWER6_5 = 0x0F000001, /* POWER6 in POWER5 mode */
- CPU_POWERPC_POWER6A = 0x0F000002,
CPU_POWERPC_POWER_SERVER_MASK = 0xFFFF0000,
CPU_POWERPC_POWER7_BASE = 0x003F0000,
CPU_POWERPC_POWER7_v23 = 0x003F0203,
--
2.7.4
- [Qemu-ppc] [PULL 00/19] ppc-for-2.8 queue 20161115, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 01/19] bitops: fix rol/ror when shift is zero, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 03/19] target-ppc: add vrldnm and vrlwnm instructions, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 16/19] ppc/pnv: fix xscom address translation for POWER9, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 13/19] FU exceptions should carry a cause (IC), David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 14/19] spapr-vty: Fix bad assert() statement, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 06/19] ppc/pnv: fix compile breakage on old gcc, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 11/19] target-ppc: Implement bcdctz. instruction, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 07/19] ppc: Remove some stub POWER6 models,
David Gibson <=
- [Qemu-ppc] [PULL 02/19] target-ppc: add vrldnmi and vrlwmi instructions, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 05/19] powernv: CPU compatibility modes don't make sense for powernv, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 09/19] target-ppc: Implement bcdctn. instruction, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 18/19] tests: add XSCOM tests for the PowerNV machine, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 04/19] target-ppc: add vprtyb[w/d/q] instructions, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 17/19] ppc/pnv: Fix fatal bug on 32-bit hosts, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 12/19] spapr: Fix migration of PCI host bridges from qemu-2.7, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 19/19] boot-serial-test: Add a test for the powernv machine, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 15/19] ppc/pnv: add a 'xscom_core_base' field to PnvChipClass, David Gibson, 2016/11/14
- [Qemu-ppc] [PULL 08/19] target-ppc: Implement bcdcfn. instruction, David Gibson, 2016/11/14