[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [Qemu-devel] [PATCH 04/13] target-ppc: implement lxvll in
From: |
Richard Henderson |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH 04/13] target-ppc: implement lxvll instruction |
Date: |
Mon, 5 Dec 2016 09:59:53 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 |
On 12/05/2016 09:52 AM, Richard Henderson wrote:
> On 12/05/2016 03:25 AM, Nikunj A Dadhania wrote:
>> +void helper_lxvll(CPUPPCState *env, target_ulong addr,
>> + target_ulong xt_num, target_ulong rb)
>> +{
>> + ppc_vsr_t xt;
>> +
>> + getVSR(xt_num, &xt, env);
>> + if (unlikely((rb & 0xFF) == 0)) {
>> + xt.s128 = int128_make128(0, 0);
>
> Nit: int128_zero.
>
>> + } else {
>> + target_ulong end = ((rb & 0xFF) * 8) - 1;
>> + if (msr_le) {
>> + xt.u64[LO_IDX] = cpu_ldq_data_ra(env, addr, GETPC());
>> + addr = addr_add(env, addr, 8);
>> + xt.u64[HI_IDX] = cpu_ldq_data_ra(env, addr, GETPC());
>> + xt.s128 = int128_and(xt.s128, mask_u128(127 - end, 127));
>
> The ISA document says that this is a sequence of byte operations. Which means
> that END < 127 will not access bytes outside of the length. Which means that
> your code will trigger SIGSEGV near page boundaries when real hardware won't.
>
> I also don't see how this does the right thing for little-endian.
Oh, and one more thing:
Do you need to perform the permission check on all NB bytes before writing any
of them? I suspect that real hardware does, otherwise the instruction might
not be restartable.
Are there any atomicity guarantees made by real hardware? If so, you may need
to implement this differently. If not, a comment to that effect would be
helpful.
r~
- [Qemu-ppc] [PATCH 01/13] target-ppc: move ppc_vsr_t to common header, (continued)
- [Qemu-ppc] [PATCH 01/13] target-ppc: move ppc_vsr_t to common header, Nikunj A Dadhania, 2016/12/05
- [Qemu-ppc] [PATCH 02/13] target-ppc: add mask_u128 routine, Nikunj A Dadhania, 2016/12/05
- [Qemu-ppc] [PATCH 03/13] target-ppc: implement lxvl instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-ppc] [PATCH 04/13] target-ppc: implement lxvll instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-ppc] [PATCH 05/13] target-ppc: implement stxvl instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-ppc] [PATCH 07/13] target-ppc: implement xxextractuw instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-ppc] [PATCH 09/13] target-ppc: implement stop instruction, Nikunj A Dadhania, 2016/12/05
- [Qemu-ppc] [PATCH 06/13] target-ppc: implement stxvll instructions, Nikunj A Dadhania, 2016/12/05