[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PULL 010/107] target-ppc: Implement bcdcfsq. instruction
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 010/107] target-ppc: Implement bcdcfsq. instruction |
Date: |
Thu, 2 Feb 2017 16:13:08 +1100 |
From: Jose Ricardo Ziviani <address@hidden>
bcdcfsq.: Decimal convert from signed quadword. It is not possible
to convert values less than -10^31-1 or greater than 10^31-1 to be
represented in packed decimal format.
Signed-off-by: Jose Ricardo Ziviani <address@hidden>
[dwg: Corrected constant which should be 10^16-1 but was 10^17-1]
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/helper.h | 1 +
target/ppc/int_helper.c | 38 +++++++++++++++++++++++++++++++++++++
target/ppc/translate/vmx-impl.inc.c | 7 +++++++
3 files changed, 46 insertions(+)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 125d6c5..ec5ccbe 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -377,6 +377,7 @@ DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
DEF_HELPER_3(bcdctn, i32, avr, avr, i32)
DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
DEF_HELPER_3(bcdctz, i32, avr, avr, i32)
+DEF_HELPER_3(bcdcfsq, i32, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index fbc84e2..a809482 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2842,6 +2842,44 @@ uint32_t helper_bcdctz(ppc_avr_t *r, ppc_avr_t *b,
uint32_t ps)
return cr;
}
+uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
+{
+ int i;
+ int cr = 0;
+ uint64_t lo_value;
+ uint64_t hi_value;
+ ppc_avr_t ret = { .u64 = { 0, 0 } };
+
+ if (b->s64[HI_IDX] < 0) {
+ lo_value = -b->s64[LO_IDX];
+ hi_value = ~b->u64[HI_IDX] + !lo_value;
+ bcd_put_digit(&ret, 0xD, 0);
+ } else {
+ lo_value = b->u64[LO_IDX];
+ hi_value = b->u64[HI_IDX];
+ bcd_put_digit(&ret, bcd_preferred_sgn(0, ps), 0);
+ }
+
+ if (divu128(&lo_value, &hi_value, 1000000000000000ULL) ||
+ lo_value > 9999999999999999ULL) {
+ cr = CRF_SO;
+ }
+
+ for (i = 1; i < 16; hi_value /= 10, i++) {
+ bcd_put_digit(&ret, hi_value % 10, i);
+ }
+
+ for (; i < 32; lo_value /= 10, i++) {
+ bcd_put_digit(&ret, lo_value % 10, i);
+ }
+
+ cr |= bcd_cmp_zero(&ret);
+
+ *r = ret;
+
+ return cr;
+}
+
void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
{
int i;
diff --git a/target/ppc/translate/vmx-impl.inc.c
b/target/ppc/translate/vmx-impl.inc.c
index 7143eb3..36141e5 100644
--- a/target/ppc/translate/vmx-impl.inc.c
+++ b/target/ppc/translate/vmx-impl.inc.c
@@ -989,10 +989,14 @@ GEN_BCD2(bcdcfn)
GEN_BCD2(bcdctn)
GEN_BCD2(bcdcfz)
GEN_BCD2(bcdctz)
+GEN_BCD2(bcdcfsq)
static void gen_xpnd04_1(DisasContext *ctx)
{
switch (opc4(ctx->opcode)) {
+ case 2:
+ gen_bcdcfsq(ctx);
+ break;
case 4:
gen_bcdctz(ctx);
break;
@@ -1014,6 +1018,9 @@ static void gen_xpnd04_1(DisasContext *ctx)
static void gen_xpnd04_2(DisasContext *ctx)
{
switch (opc4(ctx->opcode)) {
+ case 2:
+ gen_bcdcfsq(ctx);
+ break;
case 4:
gen_bcdctz(ctx);
break;
--
2.9.3
- [Qemu-ppc] [PULL 000/107] ppc-for-2.9 queue 20170202, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 004/107] target-ppc: Fix xscmpodp and xscmpudp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 007/107] target-ppc: implement lxsd and lxssp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 001/107] disas/ppc: Fix indefinite articles in comments, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 003/107] target-ppc: rename CRF_* defines as CRF_*_BIT, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 011/107] target-ppc: Implement bcdctsq. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 002/107] target-ppc: Consolidate instruction decode helpers, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 010/107] target-ppc: Implement bcdcfsq. instruction,
David Gibson <=
- [Qemu-ppc] [PULL 006/107] target-ppc: Add xscmpoqp and xscmpuqp instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 008/107] target-ppc: implement stxsd and stxssp, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 020/107] target-ppc: move ppc_vsr_t to common header, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 014/107] target-ppc: add vextu[bhw][lr]x instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 005/107] target-ppc: Add xscmpexp[dp, qp] instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 021/107] target-ppc: implement stop instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 016/107] pseries: Make cpu_update during CAS unconditional, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 018/107] ppc: Rename cpu_version to compat_pvr, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 013/107] target-ppc: Implement bcdsetsgn. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 024/107] target-ppc: implement xsnegqp instruction, David Gibson, 2017/02/02